W742E/C81A
4-BIT MICROCONTROLLER
Publication Release Date: December 2000
- 1 - Revision A1
Table of Contents-
1.
GENERAL DESCRIPTION................................................................................................................... 3
2.
FEATURES .......................................................................................................................................... 3
3.
PIN CONFIGURATION ........................................................................................................................ 5
4.
PIN DESCRIPTION .............................................................................................................................. 6
4.1
W742E81A Pad list ................................................................................................................. 7
5.
BLOCK DIAGRAM.............................................................................................................................. 10
6.
FUNCTIONAL DESCRIPTION ........................................................................................................... 11
6.1
Program Counter (PC)........................................................................................................... 11
6.2
Stack Register (STACK)........................................................................................................ 11
6.3
Program Memory (ROM) ....................................................................................................... 11
6.3.1
ROM Page Register (ROMPR) .........................................................................................12
6.4
Data Memory (RAM).............................................................................................................. 13
6.4.1
Architecture ......................................................................................................................13
6.4.2
Page Register (PAGE)......................................................................................................14
6.4.3
WR Page Register (WRP)................................................................................................14
6.4.4
Data Bank Register (DBKR) .............................................................................................15
6.5
Accumulator (ACC)................................................................................................................ 16
6.6
Arithmetic and Logic Unit (ALU) ............................................................................................ 16
6.7
Main-Oscillator....................................................................................................................... 16
6.8
Sub-oscillator......................................................................................................................... 16
6.9
Dividers.................................................................................................................................. 16
6.10
Dual-clock Operation ............................................................................................................. 17
6.11
WatchDog Timer (WDT) and WatchDog Timer Register (WDTR) ........................................ 18
6.12
Timer/Counter........................................................................................................................ 20
6.12.1
Timer 0 (TM0) .................................................................................................................20
6.12.2
Timer 1 (TM1) .................................................................................................................21
6.12.3
Mode Register 0 (MR0) ..................................................................................................23
6.12.4
Mode Register 1 (MR1) & MFP Control Pin (BUZCR) ....................................................23
6.13
Interrupts ............................................................................................................................... 24
6.14
Stop Mode Operation ............................................................................................................ 25
6.15
Stop Mode Wake-up Enable Flag for RC Port (SEF) ............................................................ 25
6.16
Hold Mode Operation ............................................................................................................ 25
6.16.1
Hold Mode Release Enable Flag (HEF) .........................................................................26
W742E/C81A
- 2 -
6.16.2
Interrupt Enable Flag (IEF) .............................................................................................27
6.16.3
Port Enable Flag (PEF)...................................................................................................27
6.16.4
Hold Mode Release Condition Flag (HCF) .....................................................................28
6.16.5
Event Flag (EVF) ............................................................................................................28
6.17
Reset Function ...................................................................................................................... 29
6.18
Input/Output Ports RA, RB & RD........................................................................................... 30
6.18.1
Port Mode 0 Register (PM0) ...........................................................................................31
6.18.2
Port Mode 1 Register (PM1) ...........................................................................................31
6.18.3
Port Mode 2 Register (PM2) ...........................................................................................31
6.18.4
Port Mode 5 Register (PM5) ...........................................................................................32
6.19
Input Ports RC ....................................................................................................................... 32
6.19.1
Port Status Register 0 (PSR0)........................................................................................34
6.20
Output Port RE & RF ............................................................................................................. 34
6.21
DTMF Output Pin (DTMF) ..................................................................................................... 34
6.21.1
DTMF register.................................................................................................................35
6.21.2
Dual Tone Control Register (DTCR) ...............................................................................35
6.22
MFP Output Pin (MFP) .......................................................................................................... 36
6.23
LCD Controller/Driver ............................................................................................................ 37
6.23.1
LCD RAM addressing method ........................................................................................38
6.23.2
The output waveforms for the LCD driving mode ...........................................................39
6.24
Mode Description................................................................................................................... 41
7.
ABSOLUTE MAXIMUM RATINGS ..................................................................................................... 41
8.
DC CHARACTERISTICS ................................................................................................................... 41
9.
AC CHARACTERISTICS.................................................................................................................... 42
10.
INSTRUCTION SET TABLE............................................................................................................... 43
W742E/C81A
Publication Release Date: December 2000
- 3 Revision A1
1. GENERAL DESCRIPTION
The W742E/C81A is a high-performance 4-bit microcontroller (
µ
C) that provides an LCD driver. The
device contains a 4-bit ALU, two 8-bit timers, two dividers (for two oscillators) in dual-clock operation, a
40
×
4 LCD driver, six 4-bit I/O ports (including 1 output port for LED driving), and one channel DTMF
generator. There are also five interrupt sources and 16-levels subroutine nesting for interrupt
applications. The W742E/C81A operates on very low current and has two power reduction modes, that
is the dual-clock slow operation and STOP mode, which help to minimize power dissipation.
2. FEATURES
·
Operating voltage: 2.4V 5.5V
·
Dual-clock operation or single-clock operation (By option)
·
Main-oscillator
-
Connect to 3.58 MHz crystal or 400 KHz that can be selected by option code
-
Crystal or RC oscillator can be selected by code option
·
Sub-oscillator
-
Connect to 32768 Hz crystal only
·
Memory
-
16384 x 16 bits program electrical erasable EPROM (including 64K x 4 bit look-up table)
-
2048 x 4 bits data RAM (including 16 nibbles x 16 pages working registers)
-
40 x 4 LCD data RAM
·
24 input/output pins
-
Port for input only: 1 ports/4 pins (RC)
-
Input/output ports: 3 ports/12 pins (RA, RB & RD)
-
High sink current output port for LED driving: 1 port /4 pins (RE)
-
Port for output only: 1 port/ 4 pins (RF)
·
Power-down mode
-
Hold function: no operation (main-oscillator and sub-oscillator still operate)
-
Stop function: no operation (main-oscillator and sub-oscillator are stopped)
-
Dual-clock slow operation mode: system is operated by the sub-oscillator (F
OSC
= Fs and Fm is
stopped)
·
Five types of interrupts
-
Four internal interrupts (Divider0, Divider1, Timer 0, Timer 1)
-
One external interrupts (RC Port)
·
LCD driver output
W742E/C81A
- 4 -
-
40 segments x 4 commons
-
1/4 duty 1/3 bias driving mode
-
Clock source should be the sub-oscillator clock in the dual-clock operation mode
·
MFP output pin
-
Output is software selectable as modulating or nonmodulating frequency
-
Works as frequency output specified by Timer 1
·
DTMF output pin
-
Output is one channel Dual Tone Multi-Frequency signal for dialling
·
Two built-in 14-bit frequency dividers
-
Divider0: the clock source is the output of the main-oscillator
-
Divider1: the clock source is the output of the sub-oscillator (dual-clock mode) or the Fosc/128
(single-clock mode)
·
Two built-in 8-bit programmable countdown timers
-
Timer 0: one of two internal clock frequencies (F
OSC
/4 or F
OSC
/1024) can be selected
-
Timer 1: with auto-reload function and one of three internal clock frequencies (F
OSC
, F
OSC
/64 or
Fs) can be selected by MR1 register; and the specified frequency can be delivered to MFP pin
·
Built-in 18/15-bit watchdog timer selectable for system reset; enable the watch dog timer or not is
determined by code option
·
Powerful instruction set
·
16-levels subroutine (include interrupt) nesting
W742E/C81A
Publication Release Date: December 2000
- 5 Revision A1
3. PIN CONFIGURATION
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19
36
37
38
39
40
41
42
43
44
45
46
47
48
81
82
83
84
85
86
87
88
89
90
91
92
RC1
RC0
RB3
RB2
RB1
RB0
RA3
RA1
S E G 3 1
S E G 3 0
S E G 2 9
S E G 2 8
S E G 2 7
S E G 2 6
S E G 2 5
S E G 2 4
S E G 2 3
R
E
1
R
E
2
S E G 2 2
S E G 2 1
S E G 2 0
S E G 1 9
RA0
M O D E
RA2
20 21 22 23 24
49
50
61 60 59 58 57
93
94
95
N
C
N C
RD0
RC3
RC2
25 26 27 28 29
56 55 54 53 52
96
97
RD2
RD1
98
99
100
N C
RD3
31
32
33
34
35
S E G 1 8
S E G 1 7
S E G 1 6
S E G 1 5
N
C
V
P
P
R
E
0
R
E
3
R
F
0
R
F
1
R
F
2
R
F
3
V
S
S
S
E
G
0
S
E
G
1
S
E
G
2
S
E
G
3
S
E
G
4
S
E
G
5
S
E
G
6
S
E
G
7
S
E
G
8
S
E
G
9
S
E
G
1
0
S
E
G
1
1
S
E
G
1
2
S
E
G
1
3
N
C
N
C
N
C
51
30
N
C
N
C
N
C
S
E
G
3
3
S
E
G
3
4
S
E
G
3
5
S
E
G
3
6
S
E
G
3
7
S
E
G
3
8
S
E
G
3
9
C
O
M
3
C
O
M
2
C
O
M
1
C
O
M
0
V
D
D
2
V
D
D
1
D
H
2
D
H
1
X
O
U
T
2
X
I
N
2
V
D
D
X
O
U
T
1
X
I
N
1
D
T
M
F
R
E
S
D
A
T
A
N
C
N
C
N
C
S
E
G
1
4
N C
S
E
G
3
2
M F P
N C
N C
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