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Part Number SN74LVC16244A

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FEATURES
DESCRIPTION/ORDERING INFORMATION
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and
SN74LVC16244A
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS699 ­ AUGUST 2003 ­ REVISED MARCH 2005
·
Member of the Texas Instruments WidebusTM
Family
·
Operates From 1.65 V to 3.6 V
·
Inputs Accept Voltages to 5.5 V
·
Max t
pd
of 4.1 ns at 3.3 V
·
Typical V
OLP
(Output Ground Bounce) < 0.8 V
at V
CC
= 3.3 V, T
A
= 25
°
C
·
Typical V
OHV
(Output V
OH
Undershoot) > 2 V
at V
CC
= 3.3 V, T
A
= 25
°
C
·
I
off
Supports Partial-Power-Down Mode
Operation
·
Supports Mixed-Mode Signal Operation on All
Ports (5-V Input/Output Voltage With
3.3-V V
CC
)
·
Latch-Up Performance Exceeds 250 mA Per
JESD 17
·
ESD Protection Exceeds JESD 22
­ 2000-V Human-Body Model (A114-A)
­ 1000-V Charged-Device Model (C101)
This 16-bit buffer/driver is designed for 1.65-V to
3.6-V V
CC
operation.
The SN74LVC16244A is designed specifically to
improve the performance and density of 3-state
memory
address
drivers,
clock
drivers,
and
bus-oriented receivers and transmitters.
symmetrical active-low output-enable (OE) inputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in
a mixed 3.3-V/5-V system environment.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
FBGA ­ GRD
SN74LVC16244AGRDR
Tape and reel
LD244A
FBGA ­ ZRD (Pb-free)
SN74LVC16244AZRDR
Tube
SN74LVC16244ADL
SSOP ­ DL
LVC16244A
­40
°
C to 85
°
C
Tape and reel
SN74LVC16244ADLR
TSSOP ­ DGG
Tape and reel
SN74LVC16244ADGGR
LVC16244A
TVSOP ­ DGV
Tape and reel
SN74LVC16244ADGVR
LD244A
VFBGA ­ GQL
Tape and reel
SN74LVC16244AGQLR
LD244A
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003­2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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DESCRIPTION/ORDERING INFORMATION (CONTINUED)
GQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
2
1
3
4
6
5
K
GRD OR ZRD PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
2
1
3
4
6
5
SN74LVC16244A
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS699 ­ AUGUST 2003 ­ REVISED MARCH 2005
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
TERMINAL ASSIGNMENTS
(1)
1
2
3
4
5
6
A
1OE
NC
NC
NC
NC
2OE
B
1Y2
1Y1
GND
GND
1A1
1A2
C
1Y4
1Y3
V
CC
V
CC
1A3
1A4
D
2Y2
2Y1
GND
GND
2A1
2A2
E
2Y4
2Y3
2A3
2A4
F
3Y1
3Y2
3A2
3A1
G
3Y3
3Y4
GND
GND
3A4
3A3
H
4Y1
4Y2
V
CC
V
CC
4A2
4A1
J
4Y3
4Y4
GND
GND
4A4
4A3
K
4OE
NC
NC
NC
NC
3OE
(1)
NC ­ No internal connection
TERMINAL ASSIGNMENTS
(1)
1
2
3
4
5
6
A
1Y1
NC
1OE
2OE
NC
1A1
B
1Y3
1Y1
NC
NC
1A2
1A3
C
2Y1
1Y4
V
CC
V
CC
1A4
2A1
D
2Y3
2Y2
GND
GND
2A2
2A3
E
3Y1
2Y4
GND
GND
2A4
3A1
F
3Y3
3Y2
GND
GND
3A2
3A3
G
4Y1
3Y4
V
CC
V
CC
3A4
4A1
H
4Y3
4Y2
NC
NC
4A2
4A3
J
4Y3
NC
4OE
3OE
NC
4A4
(1)
NC ­ No internal connection
FUNCTION TABLE
(EACH 4-BIT BUFFER)
INPUTS
OUTPUT
Y
OE
A
L
H
H
L
L
L
H
X
Z
2
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1OE
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
1
47
46
44
43
2
3
5
6
2OE
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
48
41
40
38
37
8
9
11
12
3OE
3A1
3A2
3A3
3A4
3Y1
3Y2
3Y3
3Y4
25
36
35
33
32
13
14
16
17
4OE
4A1
4A2
4A3
4A4
4Y1
4Y2
4Y3
4Y4
24
30
29
27
26
19
20
22
23
Pin numbers shown are for the DGG, DGV, and DL packages.
Absolute Maximum Ratings
(1)
SN74LVC16244A
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS699 ­ AUGUST 2003 ­ REVISED MARCH 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
V
CC
Supply voltage range
­0.5
6.5
V
V
I
Input voltage range
(2)
­0.5
6.5
V
V
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
­0.5
6.5
V
V
O
Voltage range applied to any output in the high or low state
(2) (3)
­0.5
V
CC
+ 0.5
V
I
IK
Input clamp current
V
I
< 0
­50
mA
I
OK
Output clamp current
V
O
< 0
­50
mA
I
O
Continuous output current
±
50
mA
Continuous current through each V
CC
or GND
±
100
mA
DGG package
70
DGV package
58
JA
Package thermal impedance
(4)
DL package
63
°
C/W
GQL package
42
GRD/ZRD package
36
T
stg
Storage temperature range
­65
150
°
C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
'The value of V
CC
is provided in the recommended operating conditions table.
(4)
The package thermal impedance is calculated in accordance with JESD 51-7.
3
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Recommended Operating Conditions
(1)
SN74LVC16244A
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS699 ­ AUGUST 2003 ­ REVISED MARCH 2005
MIN
MAX
UNIT
Operating
1.65
3.6
V
CC
Supply voltage
V
Data retention only
1.5
V
CC
= 1.65 V to 1.95 V
0.65
×
V
CC
V
IH
High-level input voltage
V
CC
= 2.3 V to 2.7 V
1.7
V
V
CC
= 2.7 V to 3.6 V
2
V
CC
= 1.65 V to 1.95 V
0.35
×
V
CC
V
IL
Low-level input voltage
V
CC
= 2.3 V to 2.7 V
0.7
V
V
CC
= 2.7 V to 3.6 V
0.8
V
I
Input voltage
0
5.5
V
High or low state
0
V
CC
V
O
Output voltage
V
3-state
0
5.5
V
CC
= 1.65 V
­4
V
CC
= 2.3 V
­8
I
OH
High-level output current
mA
V
CC
= 2.7 V
­12
V
CC
= 3 V
­24
V
CC
= 1.65 V
4
V
CC
= 2.3 V
8
I
OL
Low-level output current
mA
V
CC
= 2.7 V
12
V
CC
= 3 V
24
t/
v
Input transition rise or fall rate
10
ns/V
T
A
Operating free-air temperature
­40
85
°
C
(1)
All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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Electrical Characteristics
Switching Characteristics
Operating Characteristics
SN74LVC16244A
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS699 ­ AUGUST 2003 ­ REVISED MARCH 2005
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V
CC
MIN TYP
(1)
MAX
UNIT
I
OH
= ­100
µ
A
1.65 V to 3.6 V
V
CC
­ 0.2
I
OH
= ­4 mA
1.65 V
1.2
I
OH
= ­8 mA
2.3 V
1.7
V
OH
V
2.7 V
2.2
I
OH
= ­12 mA
3 V
2.4
I
OH
= ­24 mA
3 V
2.2
I
OL
= 100
µ
A
1.65 V to 3.6 V
0.2
I
OL
= 4 mA
1.65 V
0.45
V
OL
I
OL
= 8 mA
2.3 V
0.7
V
I
OL
= 12 mA
2.7 V
0.4
I
OL
= 24 mA
3 V
0.55
I
I
V
I
= 0 to 5.5 V
3.6 V
±
5
µ
A
I
off
V
I
or V
O
= 5.5 V
0
±
10
µ
A
I
OZ
V
O
= 0 to 5.5 V
3.6 V
±
10
µ
A
V
I
= V
CC
or GND
20
I
CC
I
O
= 0
3.6 V
µ
A
3.6 V
V
I
5.5 V
(2)
20
I
CC
One input at V
CC
­ 0.6 V,
Other inputs at V
CC
or GND
2.7 V to 3.6 V
500
µ
A
C
i
V
I
= V
CC
or GND
3.3 V
5.5
pF
C
o
V
O
= V
CC
or GND
3.3 V
6
pF
(1)
All typical values are at V
CC
= 3.3 V, T
A
= 25
°
C.
(2)
This applies in the disabled state only.
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
= 2.7 V
FROM
TO
±
0.15 V
±
0.2 V
±
0.3 V
PARAMETER
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
t
pd
A
Y
1.5
6.6
1
3.9
1
4.7
1.1
4.1
ns
t
en
OE
Y
1.5
7.5
1
4.7
1
5.8
1
4.6
ns
t
dis
OE
Y
1.5
10.3
1
5.3
1
6.2
1.8
5.8
ns
t
sk(o)
1
ns
T
A
= 25
°
C
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
TEST
PARAMETER
UNIT
CONDITIONS
TYP
TYP
TYP
Outputs enabled
33
35
39
Power dissipation capacitance
C
pd
f = 10 MHz
pF
per buffer/driver
Outputs disabled
2
3
4
5