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Part Number PCI1225

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PCI1225 GHK/PDV
PC CARD CONTROLLERS
SCPS035B ­ MAY 1998 ­ REVISED ­ MAY 2000
1
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
D
PCI Bus Power Management Interface
Specification 1.0 Compliant
D
ACPI 1.0 Compliant
D
Fully Compatible With the Intel
TM
430TX
(Mobile Triton II) Chipset
D
Packaged in a 208-Pin Low-Profile QFP
(PDV) or GHK High Density Ball Grid Array
(BGA)
D
PCI Local Bus Specification Revision 2.2
Compliant
D
1997 PC Card Standard Compliant
D
PC 99 Compliant
D
3.3-V Core Logic With Universal PCI
Interfaces Compatible With 3.3-V and 5-V
PCI Signaling Environments
D
Mix-and-Match 5-V/3.3-V 16-bit PC Cards
and 3.3-V CardBus Cards
D
Supports Two PC Card or CardBus Slots
With Hot Insertion and Removal
D
Uses Serial Interface to TI TPS2202/2206
Dual-Slot PC Card Power Switch
D
Supports Burst Transfers to Maximize Data
Throughput on the PCI Bus and CardBus
Bus
D
Supports Parallel PCI Interrupts, Parallel
ISA IRQ and Parallel PCI Interrupts, Serial
ISA IRQ With Parallel PCI Interrupts, and
Serial ISA IRQ and PCI Interrupts
D
Serial EEPROM Interface for Loading
Subsystem ID and Subsystem Vendor ID
D
Pipelined Architecture Allows Greater Than
130-MBps Throughput From
CardBus-to-PCI and From PCI-to-CardBus
D
Supports up to Five General-Purpose I/Os
D
Programmable Output Select for CLKRUN
D
Multifunction PCI Device With Separate
Configuration Space for Each Socket
D
Five PCI Memory Windows and Two I/O
Windows Available for Each R2 Socket
D
Two I/O Windows and Two Memory
Windows Available to Each CardBus
Socket
D
Exchangeable Card Architecture (ExCA)
Compatible Regesters Are Mapped in
Memory and I/O Space
D
Intel 82365SL-DF Register Compatible
D
Supports Distributed DMA (DDMA) and
PC/PCI DMA
D
Supports 16-Bit DMA on Both PC Card
Sockets
D
Supports Ring Indicate, SUSPEND, PCI
CLKRUN, and CardBus CCLKRUN
D
LED Activity Pins
D
Supports PCI Bus Lock (LOCK)
D
Advanced Submicron, Low-Power CMOS
Technology
Description
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Block Diagram
3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Terminal Assignments
4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Name/Terminal Number Sort Tables
6
. . . . . . . . . . . . . . . . . . . . . . . . . .
Terminal Functions
12
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Supply Sequencing
22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O Characteristics
22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clamping Rail Voltages
22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peripheral Component Interconnect (PCI) Interface
23
. . . . . . . . . . . . . . . .
PC Card Applications
24
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Serial Bus Interface
30
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Programmable Interrupt Subsystem
36
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Management Overview
41
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PC Card Controller Programming Model
45
. . . . . . . . . . . . . . . . . . . . . . . . . .
PCI Configuration Registers (Functions 0 and 1)
46
. . . . . . . . . . . . . . . . . . .
ExCA Compatibility Registers (Functions 0 and 1)
83
. . . . . . . . . . . . . . . . . .
CardBus Socket Registers (Functions 0 and 1)
106
. . . . . . . . . . . . . . . . . . . . . .
Distributed DMA (DDMA) Registers
114
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings
119
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Conditions
120
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics
121
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCI Clock/Reset Timing Requirements
122
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCI Timing Requirements
122
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parameter Measurement Information
123
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCI Bus Parameter Measurement Information
124
. . . . . . . . . . . . . . . . . . . . . . .
PC Card Cycle Timing
125
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements (Memory Cycles)
126
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements (I/O Cycles)
126
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Characteristics (Miscellaneous
127
. . . . . . . . . . . . . . . . . . . . . . . . . . .
PC Card Parameter Measurement Information
128
. . . . . . . . . . . . . . . . . . . . . . .
Mechanical Data
129
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table of Contents
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
©
2000, Texas Instruments Incorporated
Intel is a trademark of Intel Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
PCI1225 GHK/PDV
PC CARD CONTROLLERS
SCPS035B ­ MAY 1998 ­ REVISED ­ MAY 2000
2
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
description
The TI PCI1225 is a high-performance PCI-to-PC Card controller that supports two independent card sockets
compliant with the 1997 PC Card Standard. The PCI1225 provides a rich feature set that makes it the best
choice for bridging between PCI and PC Cards in both notebook and desktop computers. The 1997 PC Card
Standard retains the 16-bit PC Card specification defined in PCMCIA Release 2.2 and defines the new 32-bit
PC Card (CardBus), capable of full 32-bit data transfers at 33 MHz. The PCI1225 supports any combination
of 16-bit and CardBus PC Cards in the two sockets, powered at 5 V or 3.3 V, as required.
The PCI1225 is compliant with the PCI Local Bus Specification 2.2, and its PCI interface can act as either a PCI
master device or a PCI slave device. The PCI bus mastering is initiated during 16-bit PC Card DMA transfers
or CardBus PC Card bridging transactions. The PCI1225 is also compliant with the latest
PCI Bus Power
Management Interface Specification.
All card signals are internally buffered to allow hot insertion and removal without external buffering. The PCI1225
is register compatible with the Intel 82365SL-DF ExCA controller. The PCI1225 internal data path logic allows
the host to access 8-, 16-, and 32-bit cards using full 32-bit PCI cycles for maximum performance. Independent
buffering and a pipeline architacture provide an unsurpassed performance level with sustained bursting. The
PCI1225 can also be programmed to accept fast posted writes to improve system-bus utilization.
Multiple system-interrupt signaling options are provided, including: parallel PCI, parallel ISA, serialized ISA, and
serialized PCI. Furthermore, general-purpose inputs and outputs are provided for the board designer to
implement sideband functions. Many other features designed into the PCI1225, such as socket activity
light-emitting diode (LED) outputs, are discussed in detail throughout the design specification.
An advanced complementary metal-oxide semiconductor (CMOS) process is used to achieve low
system-power consumption while operating at PCI clock rates up to 33 MHz. Several low-power modes enable
the host power management system to further reduce power consumption.
Unused PCI1225 inputs must be pulled up using a 43-k
W
resistor.
PCI1225 GHK/PDV
PC CARD CONTROLLERS
SCPS035B ­ MAY 1998 ­ REVISED ­ MAY 2000
3
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
system block diagram
A simplified block diagram of the PCI1225 is provided below. The PCI interface includes all address/data and
control signals for PCI protocol. The interrupt interface includes terminals for parallel PCI, parallel ISA, and
serialized PCI and ISA signaling. Miscellaneous system interface terminals include multifunction terminals:
SUSPEND, RI_OUT/PME (power management control signal), and SPKROUT.
PCI Bus
PCI1225
Activity LEDs
PCI950
IRQSER
Deserializer
IRQSER
3
Interrupt
Controller
INTA
INTB
IRQ2­15
PCI930
ZV Switch
23
23
PC Card
Socket A
TPS2206
Power
Switch
3
PC Card
Socket B
External ZV Port
VGA
Controller
Audio
Subsystem
Zoom Video
19
4
Zoom Video
NOTE: The PC Card interface is 68 pins for CardBus and 16-bit PC Cards. In zoomed-video mode 23 pins are used for routing the zoomed
video signals to the VGA controller and audio subsystem.
68
68
PCI1225 GHK/PDV
PC CARD CONTROLLERS
SCPS035B ­ MAY 1998 ­ REVISED ­ MAY 2000
4
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
terminal assignments
B_CCLKRUN
A_CAD25
A_CAD13
A_CAD0
B_CAD9
B_CAD1
B_CCD1
AD4
AD17
CCP
AD10
AD9
AD8
AD7
AD6
AD5
AD3
GND
AD1
AD0
B_CAD0
B_CAD2
B_CAD4
B_CAD3
GND
B_CAD6
B_CAD5
B_RSVD
B_CAD7
B_CC/BE0
B_CAD10
B_CAD1
1
B_CAD14
B_CAD12
B_CAD15
B_CAD16
B_CP
AR
B_CPERR
GND
B_CSTOP
B_CGNT
B_CIRDY
B_CDEVSEL
B_CCLK
B_CTRDY
B_CFRAME
B_CC/BE2
AD2
B_CAD8
B_CAD13
B_CC/BE1
B_RSVD
B_CBLOCK
MFUNC2
C/BE3
RI_OUT/PME
AD25
GND
REQ
PRST
AD11
AD31
AD30
AD29
AD28
AD27
AD24
PCLK
GND
IDSEL
AD22
AD20
AD26
AD23
AD16
FRAME
GND
IRDY
DEVSEL
PERR
SERR
PAR
AD15
AD14
AD13
GND
AD12
A_CC/BE1
A_CAD16
A_CAD14
A_CAD12
A_CAD11
A_CAD10
GND
A_CAD7
A_CAD9
A_CC/BE0
A_CAD8
A_RSVD
A_CAD5
A_CAD6
A_CAD4
A_CAD1
A_CAD2
A_CCD1
B_CAD31
B_RSVD
B_CAD30
B_CAD29
B_CAD28
B_CAD27
GND
B_CCD2
B_CSTSCHG
B_CAUDIO
B_CVS1
B_CAD26
B_CAD25
B_CSERR
B_CC/BE3
B_CAD24
V
B_CAD23
B_CREQ
B_CAD22
B_CAD21
B_CRST
B_CAD20
B_CVS2
B_CAD19
B_CAD18
B_CAD17
158
157
160
159
162
161
164
163
166
165
168
167
170
169
172
171
174
173
176
175
178
177
180
179
182
181
184
183
186
185
188
187
190
189
192
191
194
193
196
195
198
197
200
199
202
201
204
203
206
205
208
207
103
104
101
102
99
100
97
98
95
96
93
94
91
92
89
90
87
88
85
86
83
84
81
82
79
80
77
78
75
76
73
74
71
72
69
70
67
68
65
66
63
64
61
62
59
60
57
58
55
56
53
54
A_CAD3
B_CINT
A_CAD15
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40
39
42
41
44
43
46
45
48
47
50
49
52
51
106
105
108
107
11
0
109
11
2
111
11
4
11
3
11
6
11
5
11
8
11
7
120
11
9
122
121
124
123
126
125
128
127
130
129
132
131
134
133
136
135
138
137
140
139
142
141
144
143
146
145
148
147
150
149
152
151
154
153
156
155
SUSPEND
GND
MFUNC0
DA
T
A
SPKROUT
LA
TCH
CLOCK
A_CAD31
VCCI
A_CAD30
A_RSVD
A_CAD28
A_CAD29
A_CCD2
A_CAD27
A_CCLKRUN
A_CAUDIO
A_CSTSCHG
A_CINT
A_CSERR
A_CAD26
A_CVS1
A_CC/BE3
A_CAD24
A_CAD23
GND
A_CAD21
A_CAD22
A_CREQ
A_CAD20
A_CRST
A_CAD19
A_CVS2
A_CAD18
A_CFRAME
A_CC/BE2
A_CTRDY
A_CIRDY
A_CCLK
V
A_CDEVSEL
A_CAD17
A_CSTOP
A_CGNT
A_CBLOCK
A_CPERR
A_RSVD
A_CP
AR
GNT
AD21
AD19
AD18
TRDY
STOP
PCI-to-CardBus Terminal Diagram
V
C/BE0
CC
V
CC
V
CCB
V
CC
VCC
CC
V
CCA
V
CC
MFUNC1
MFUNC3
MFUNC4
MFUNC5
MFUNC6
VCC
VCC
VCC
C/BE2
VCC
C/BE1
CCP
V
Card A
Card B
PCI1225 Core
PCI
PDV LOW-PROFILE QUAD FLAT PACKAGE
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PCI1225 GHK/PDV
PC CARD CONTROLLERS
SCPS035B ­ MAY 1998 ­ REVISED ­ MAY 2000
5
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
terminal assignments (continued)
C/BE1
B_CD1
A_A1
A_D3
B_A10
B_D4
AD4
AD18
CCP
AD10
AD9
AD8
AD7
AD6
AD5
AD3
GND
AD1
AD0
B_D3
B_D1
1
B_D12
B_D5
GND
B_D13
B_D6
B_D14
B_D7
B_CE1
B_A9
B_A1
1
B_A17
B_A13
B_A14
GND
B_A20
B_WE
B_A15
B_A21
B_A16
B_A22
B_A23
B_A12
AD2
B_D15
B_A8
B_A18
B_A19
MFUNC2
AD26
C/BE3
AD28
GND
PRST
GNT
REQ
AD31
AD30
AD11
AD27
PCLK
GND
AD24
AD23
AD21
AD29
IDSEL
AD17
FRAME
GND
IRDY
DEVSEL
PERR
SERR
PAR
AD15
AD14
AD13
GND
AD12
A_A8
A_A17
A_A9
A_A11
GND
A_D7
A_A10
A_D15
A_D14
A_D6
A_D13
A_D12
A_D4
A_D11
A_CD1
B_D10
B_D2
B_D9
B_D1
B_D8
B_D0
GND
B_CD2
B_WP(IOIS16)
B_BVD1(STSCHG/RI)
B_VS1
B_A0
B_A1
B_WAIT
B_REG
B_A2
V
B_A3
B_INPACK
B_A4
B_A5
B_RESET
B_A6
B_A25
B_A7
B_A24
158
157
160
159
162
161
164
163
166
165
168
167
170
169
172
171
174
173
176
175
178
177
180
179
182
181
184
183
186
185
188
187
190
189
192
191
194
193
196
195
198
197
200
199
202
201
204
203
206
205
208
207
103
104
101
102
99
100
97
98
95
96
93
94
91
92
89
90
87
88
85
86
83
84
81
82
79
80
77
78
75
76
73
74
71
72
69
70
67
68
65
66
63
64
61
62
59
60
57
58
55
56
53
54
A_D5
B_READY(IREQ)
A_IOWR
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40
39
42
41
44
43
46
45
48
47
50
49
52
51
106
105
108
107
11
0
109
11
2
111
11
4
11
3
11
6
11
5
11
8
11
7
120
11
9
122
121
124
123
126
125
128
127
130
129
132
131
134
133
136
135
138
137
140
139
142
141
144
143
146
145
148
147
150
149
152
151
154
153
156
155
SPKROUT
GND
MFUNC0
DA
T
A
LA
TCH
CLOCK
A_D10
A_D9
A_D2
A_D8
A_D1
A_CD2
A_D0
A_WP(IOIS16)
A_BVD1(STSCHG/RI)
A_READY(IREQ)
A_W
AIT
A_A0
A_VS1
A_REG
A_A2
A_A3
GND
A_A5
A_A4
A_INP
ACK
A_A6
A_RESET
A_A25
A_VS2
A_A7
A_A23
A_A12
A_A22
A_A15
A_A16
V
A_A21
A_A24
A_A20
A_WE
A_A19
A_A14
A_A18
A_A13
AD25
AD22
AD20
AD19
TRDY
STOP
PCI-to-PC Card (16-Bit) Terminal Diagram
V
C/BE0
CC
V
CC
V
CCB
V
CC
VCC
CC
V
CCA
V
CC
MFUNC1
MFUNC3
MFUNC4
MFUNC5
MFUNC6
VCC
VCC
VCC
AD16
VCC
CCP
V
B_CE2
B_OE
B_IORD
B_IOWR
A_IORD
A_OE
A_CE2
A_CE1
B_BVD2(SPKR)
B_VS2
V
CCI
A_BVD2(SPKR)
Card A
Card B
PCI1225 Core
PCI
SUSPEND
RI_OUT/PME
C/BE2
PDV LOW-PROFILE QUAD FLAT PACKAGE
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