CY54FCT827T, CY74FCT827T
10-BIT BUFFERS
WITH 3-STATE OUTPUTS
SCCS034A SEPTEMBER 1994 REVISED OCTOBER 2001
1
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
D
Function, Pinout, and Drive Compatible
With FCT, F, and AM29827 Logic
D
Reduced V
OH
(Typically = 3.3 V) Versions
of Equivalent FCT Functions
D
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
D
I
off
Supports Partial-Power-Down Mode
Operation
D
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
D
3-State Outputs
D
Matched Rise and Fall Times
D
Fully Compatible With TTL Input and
Output Logic Levels
D
CY54FCT827T
32-mA Output Sink Current
12-mA Output Source Current
D
CY74FCT827T
64-mA Output Sink Current
32-mA Output Source Current
description
The 'FCT827T devices are 10-bit bus drivers that
provide high-performance bus-interface buffering
for wide data/address paths or buses carrying
parity. The 10-bit buffers have NANDed output
enables for maximum control flexibility. The
'FCT827T devices are designed for
high-capacitance-load drive capability, while
providing low-capacitance bus loading at both
inputs and outputs. All outputs are designed for
low-capacitance bus loading in the
high-impedance state.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Copyright
2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OE
1
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
GND
V
CC
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
Y
9
OE
2
CY74FCT827T . . . L PACKAGE
(TOP VIEW)
3 2 1 28 27
12 13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
Y
2
Y
3
Y
4
NC
Y
5
Y
6
Y
7
D
2
D
3
D
4
NC
D
5
D
6
D
7
4
26
14 15 16 17 18
GND
NC
Y
D
D
OE
NC
V
CC
NC No internal connection
8
Y
9
OE
2
D
9
D
8
CY74FCT827T . . . Q OR SO PACKAGE
(TOP VIEW)
Y
0
Y
1
0
1
1
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
CY54FCT827T, CY74FCT827T
10-BIT BUFFERS
WITH 3-STATE OUTPUTS
SCCS034A SEPTEMBER 1994 REVISED OCTOBER 2001
2
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
ORDERING INFORMATION
TA
PACKAGE
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP Q
Tape and reel
4.4
CY74FCT827CTQCT
FCT827C
SOIC
SO
Tube
4.4
CY74FCT827CTSOC
FCT827C
40
°
C to 85
°
C
SOIC SO
Tape and reel
4.4
CY74FCT827CTSOCT
FCT827C
40
°
C to 85
°
C
QSOP Q
Tape and reel
8
CY74FCT827ATQCT
FCT827A
SOIC
SO
Tube
8
CY74FCT827ATSOC
FCT827A
SOIC SO
Tape and reel
8
CY74FCT827ATSOCT
FCT827A
55
°
C to 125
°
C
LCC L
Tube
9
CY54FCT827ATLMB
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
OUTPUT
FUNCTION
OE1
OE2
D
Y
FUNCTION
L
L
L
L
Transparent
L
L
H
H
Transparent
H
X
X
Z
3 state
X
H
X
Z
3-state
H = High logic level, L = Low logic level, X = Don't care,
Z = High-impedance state
logic diagram (positive logic)
Y0
To Nine Other Channels
OE1
OE2
D0
1
13
2
23
Pin numbers shown are for the Q and SO packages.
absolute maximum rating over operating free-air temperature range (unless otherwise noted)
Supply voltage range to ground potential
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC input voltage range
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output voltage range
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output current (maximum sink current/pin)
120 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 1): Q package
61
°
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SO package
46
°
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ambient temperature range with power applied, T
A
65
°
C to 135
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
°
C to 150
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
CY54FCT827T, CY74FCT827T
10-BIT BUFFERS
WITH 3-STATE OUTPUTS
SCCS034A SEPTEMBER 1994 REVISED OCTOBER 2001
3
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
recommended operating conditions (see Note 2)
CY54FCT827T
CY74FCT827T
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
4.5
5
5.5
4.75
5
5.25
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
IOH
High-level output current
12
32
mA
IOL
Low-level output current
32
64
mA
TA
Operating free-air temperature
55
125
40
85
°
C
NOTE 2: All unused inputs of the device must be held at VCC
or GND to ensure proper device operation.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
CY54FCT827T
CY74FCT827T
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIK
VCC = 4.5 V,
IIN = 18 mA
0.7
1.2
V
VIK
VCC = 4.75 V,
IIN = 18 mA
0.7
1.2
V
VCC = 4.5 V,
IOH = 12 mA
2.4
3.3
VOH
VCC 4 75 V
IOH = 32 mA
2
V
VCC = 4.75 V
IOH = 15 mA
2.4
3.3
VOL
VCC = 4.5 V,
IOL = 32 mA
0.3
0.55
V
VOL
VCC = 4.75 V,
IOL = 64 mA
0.3
0.55
V
Vhys
All inputs
0.2
0.2
V
II
VCC = 5.5 V,
VIN = VCC
5
µ
A
II
VCC = 5.25 V,
VIN = VCC
5
µ
A
IIH
VCC = 5.5 V,
VIN = 2.7 V
±
1
µ
A
IIH
VCC = 5.25 V,
VIN = 2.7 V
±
1
µ
A
IIL
VCC = 5.5 V,
VIN = 0.5 V
±
1
µ
A
IIL
VCC = 5.25 V,
VIN = 0.5 V
±
1
µ
A
IOZH
VCC = 5.5 V,
VOUT = 2.7 V
10
µ
A
IOZH
VCC = 5.25 V,
VOUT = 2.7 V
10
µ
A
IOZL
VCC = 5.5 V,
VOUT = 0.5 V
10
µ
A
IOZL
VCC = 5.25 V,
VOUT = 0.5 V
10
µ
A
IOS
VCC = 5.5 V,
VOUT = 0 V
60
120
225
mA
IOS
VCC = 5.25 V,
VOUT = 0 V
60
120
225
mA
Ioff
VCC = 0 V,
VOUT = 4.5 V
±
1
±
1
µ
A
ICC
VCC = 5.5 V,
VIN
0.2 V,
VIN
VCC 0.2 V
0.1
0.2
mA
ICC
VCC = 5.25 V,
VIN
0.2 V,
VIN
VCC 0.2 V
0.1
0.2
mA
ICC
VCC = 5.5 V, VIN = 3.4 V§, f1 = 0, Outputs open
0.5
2
mA
ICC
VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open
0.5
2
mA
Typical values are at VCC = 5 V, TA = 25
°
C.
Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or
sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged
shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence
of parameter tests, IOS tests should be performed last.
§ Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND
CY54FCT827T, CY74FCT827T
10-BIT BUFFERS
WITH 3-STATE OUTPUTS
SCCS034A SEPTEMBER 1994 REVISED OCTOBER 2001
4
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
CY54FCT827T
CY74FCT827T
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
ICCD¶
VCC = 5.5 V, One input switching at 50% duty cycle,
Outputs open, OE1 or OE2 = GND,
VIN
0.2 V or VIN
VCC 0.2 V
0.06
0.12
mA/
ICCD¶
VCC = 5.25 V, One input switching at 50% duty cycle,
Outputs open, OE1 or OE2 = GND,
VIN
0.2 V or VIN
VCC 0.2 V
0.06
0.12
MHz
#
One bit switching
at f1 = 10 MHz
VIN
0.2 V or
VIN
VCC 0.2 V
0.7
1.4
#
VCC = 5.5 V,
Outputs open
1
at 50% duty cycle VIN = 3.4 V or GND
1
2.4
#
Outputs open,
OE1 or OE2 = GND 10 bits switching
at f1 = 2.5 MHz
VIN
0.2 V or
VIN
VCC 0.2 V
1.6
3.2||
IC#
1
at 50% duty cycle VIN = 3.4 V or GND
4.1
13.2||
mA
IC#
One bit switching
at f1 = 10 MHz
VIN
0.2 V or
VIN
VCC 0.2 V
0.7
1.4
mA
VCC = 5.25 V,
Outputs open
1
at 50% duty cycle VIN = 3.4 V or GND
1
2.4
Outputs open,
OE1 or OE2 = GND 10 bits switching
at f1 = 2.5 MHz
VIN
0.2 V or
VIN
VCC 0.2 V
1.6
3.2||
1
at 50% duty cycle VIN = 3.4 V or GND
4.1
13.2||
Ci
5
10
5
10
pF
Co
9
12
9
12
pF
¶ This parameter is derived for use in total power-supply calculations.
# IC
= ICC +
ICC
×
DH
×
NT + ICCD (f0/2 + f1
×
N1)
Where:
IC
= Total supply current
ICC
= Power-supply current with CMOS input levels
ICC = Power-supply current for a TTL high input (VIN = 3.4 V)
DH
= Duty cycle for TTL inputs high
NT
= Number of TTL inputs at DH
ICCD = Dynamic current caused by an input transition pair (HLH or LHL)
f0
= Clock frequency for registered devices, otherwise zero
f1
= Input signal frequency
N1
= Number of inputs changing at f1
All currents are in milliamperes and all frequencies are in megahertz.
|| Values for these conditions are examples of the ICC formula.
CY54FCT827T, CY74FCT827T
10-BIT BUFFERS
WITH 3-STATE OUTPUTS
SCCS034A SEPTEMBER 1994 REVISED OCTOBER 2001
5
POST OFFICE BOX 655303
·
DALLAS, TEXAS 75265
switching characteristics over operating free-air temperature range (see Figure 1)
PARAMETER
FROM
TO
TEST LOAD
CY54FCT827AT
CY74FCT827AT
CY74FCT827CT
UNIT
PARAMETER
(INPUT)
(OUTPUT)
TEST LOAD
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
tPLH
D
Y
CL = 50 pF,
1.5
9
1.5
8
1.5
4.4
ns
tPHL
D
Y
L
,
RL = 500
1.5
9
1.5
8
1.5
4.4
ns
tPLH
D
Y
CL = 300 pF,
1.5
17
1.5
15
1.5
10
ns
tPHL
D
Y
L
,
RL = 500
1.5
17
1.5
15
1.5
10
ns
tPZH
OE
Y
CL = 50 pF,
1.5
13
1.5
12
1.5
7
ns
tPZL
OE
Y
L
,
RL = 500
1.5
13
1.5
12
1.5
7
ns
tPZH
OE
Y
CL = 300 pF,
1.5
25
1.5
23
1.5
14
ns
tPZL
OE
Y
L
,
RL = 500
1.5
25
1.5
23
1.5
14
ns
tPHZ
OE
Y
CL = 5 pF,
1.5
9
1.5
9
1.5
5.7
ns
tPHL
OE
Y
L
,
RL = 500
1.5
9
1.5
9
1.5
5.7
ns
tPHZ
OE
Y
CL = 50 pF,
1.5
10
1.5
10
1.5
6
ns
tPHL
OE
Y
L
RL = 500
1.5
10
1.5
10
1.5
6
ns
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