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TARGET DATA
September 2003
STP9NK60ZFD - STF9NK60ZFD
STB9NK60ZFD
N-CHANNEL 600V - 0.85
- 7A TO-220/TO-220FP/D
2
PAK
Fast Diode SuperMESHTM MOSFET
s
TYPICAL R
DS
(on) = 0.85
s
HIGH dv/dt CAPABILITY
s
100% AVALANCHE TESTED
s
GATE CHARGE MINIMIZED
s
LOW INTRINSIC CAPACITANCES
s
VERY GOOD MANUFACTURING
REPEATIBILITY
s
FAST INTERNAL RECOVERY DIODE
DESCRIPTION
The Fast SuperMESHTM series associates all ad-
vantages of reduced on-resistance, zener gate pro-
tection and very goog dv/dt capability with a Fast
body-drain recovery diode. Such series comple-
ments the "FDmeshTM" Advanced Technology.
APPLICATIONS
s
HID BALLAST
s
ZVS PHASE-SHIFT FULL BRIDGE
CONVERTERS
ORDERING INFORMATION
TYPE
V
DSS
R
DS(on)
I
D
Pw
STP9NK60ZFD
STF9NK60ZFD
STB9NK60ZFD
600 V
600 V
600 V
< 0.95
< 0.95
< 0.95
7 A
7 A
7 A
104 W
32 W
104 W
SALES TYPE
MARKING
PACKAGE
PACKAGING
STP9NK60ZFD
P9NK60ZFD
TO-220
TUBE
STF9NK60ZFD
F9NK60ZFD
TO-220FP
TUBE
STB9NK60ZFDT4
B9NK60ZFD
D
2
PAK
TAPE & REEL
TO-220
TO-220FP
1
2
3
1
3
D
2
PAK
INTERNAL SCHEMATIC DIAGRAM
STP9NK60ZFD - STF9NK60ZFD - STB9NK60ZFD
2/9
ABSOLUTE MAXIMUM RATINGS
( ) Pulse width limited by safe operating area
(1) I
SD
7A, di/dt
200A/µs, V
DD
V
(BR)DSS
, T
j
T
JMAX.
(*) Limited only by maximum temperature allowed
THERMAL DATA
AVALANCHE CHARACTERISTICS
GATE-SOURCE ZENER DIODE
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and cost-
effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage
of external components.
Symbol
Parameter
Value
Unit
TO-220 / D
2
PAK
TO-220FP
V
DS
Drain-source Voltage (V
GS
= 0)
600
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
600
V
V
GS
Gate- source Voltage
± 30
V
I
D
Drain Current (continuos) at T
C
= 25°C
7
7 (*)
A
I
D
Drain Current (continuos) at T
C
= 100°C
4.3
4.3 (*)
A
I
DM
( )
Drain Current (pulsed)
28
28 (*)
A
P
TOT
Total Dissipation at T
C
= 25°C
104
32
W
Derating Factor
0.83
0.26
W/°C
V
ESD(G-S)
Gate source ESD (HBM-C=100pF, R=1.5K
)
4000
V
dv/dt (1)
Peak Diode Recovery voltage slope
TBD
V/ns
V
ISO
Insulation Withstand Voltage (DC)
-
2500
V
T
j
T
stg
Operating Junction Temperature
Storage Temperature
-55 to 150
°C
TO-220
D
2
PAK
TO-220FP
Unit
Rthj-case
Thermal Resistance Junction-case Max
1.02
3.85
°C/W
Rthj-pcb
Thermal Resistance Junction-pcb Max
(When mounted on minimum Footprint)
30
°C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
°C/W
T
l
Maximum Lead Temperature For Soldering
Purpose
300
°C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
7
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
280
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs=± 1mA (Open Drain)
30
V
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STP9NK60ZFD - STF9NK60ZFD - STB9NK60ZFD
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
DYNAMIC
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80%
V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= mA, V
GS
= 0
600
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 °C
1
50
µA
µA
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= ± 20V
±10
µA
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 100µA
3
3.75
4.5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10V, I
D
= 3.5 A
0.85
0.95
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
= 15 V
,
I
D
= 3.5 A
5.3
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
1110
135
30
pF
pF
pF
C
oss eq.
(3)
Equivalent Output
Capacitance
V
GS
= 0V, V
DS
= 0V to 480V
72
pF
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
r
Turn-on Delay Time
Rise Time
V
DD
= 300 V, I
D
= 3.5 A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
19
17
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 480V, I
D
= 7 A,
V
GS
= 10V
38
7
21
53
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(off)
t
f
Turn-off Delay Time
Fall Time
V
DD
= 300 V, I
D
= 3.5 A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
43
15
ns
ns
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time
Cross-over Time
V
DD
= 480V, I
D
= 7 A,
R
G
= 4.7
,
V
GS
= 10V
(Inductive Load see, Figure 5)
11
8
20
ns
ns
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
7
28
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 7 A, V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 7 A, di/dt = 100A/µs
V
DD
= 30V, T
j
= 150°C
(see test circuit, Figure 5)
150
TBD
TBD
ns
µC
A
STP9NK60ZFD - STF9NK60ZFD - STB9NK60ZFD
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Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
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STP9NK60ZFD - STF9NK60ZFD - STB9NK60ZFD
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
b
0.61
0.88
0.024
0.034
b1
1.15
1.70
0.045
0.066
c
0.49
0.70
0.019
0.027
D
15.25
15.75
0.60
0.620
E
10
10.40
0.393
0.409
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
F
1.23
1.32
0.048
0.052
H1
6.20
6.60
0.244
0.256
J1
2.40
2.72
0.094
0.107
L
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L20
16.40
0.645
L30
28.90
1.137
øP
3.75
3.85
0.147
0.151
Q
2.65
2.95
0.104
0.116
TO-220 MECHANICAL DATA
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