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December 2002
STP12NK30Z
N-CHANNEL 300V - 0.36
- 9A - TO-220
Zener-Protected SuperMESHTMPower MOSFET
s
TYPICAL R
DS
(on) = 0.36
s
EXTREMELY HIGH dv/dt CAPABILITY
s
IMPROVED ESD CAPABILITY
s
100% AVALANCHE RATED
s
GATE CHARGE MINIMIZED
s
VERY LOW INTRINSIC CAPACITANCES
s
VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESHTM series is obtained through an
extreme optimization of ST's well established strip-
based PowerMESHTM layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmeshTM products.
APPLICATIONS
s
LIGHTING
s
IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
s
HIGH CURRENT, HIGH SPEED SWITCHING
ORDERING INFORMATION
TYPE
V
DSS
R
DS(on)
I
D
(1)
Pw (1)
STP12NK30Z
300 V
< 0.4
9 A
90 W
SALES TYPE
MARKING
PACKAGE
PACKAGING
STP12NK30Z
P12NK30Z
TO-220
TUBE
TO-220
1
2
3
INTERNAL SCHEMATIC DIAGRAM
STP12NK30Z
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ABSOLUTE MAXIMUM RATINGS
THERMAL DATA
Note: 1. Pulse width limited by safe operating area
2. I
SD
< 9A, di/dt<300A/µs, V
DD
<V
(BR)DSS
, T
J
<T
JMAX
AVALANCHE CHARACTERISTICS
GATE-SOURCE ZENER DIODE
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the
usage of external components.
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
300
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
300
V
V
GS
Gate- source Voltage
± 30
V
I
D
Drain Current (continuous) at T
C
= 25°C
Drain Current (continuous) at T
C
= 100°C
9
5.6
A
A
I
DM
(1)
Drain Current (pulsed)
36
A
P
TOT
Total Dissipation at T
C
= 25°C
90
W
Derating Factor
0.72
W/°C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5K
)
3000
V/ns
dv/dt (2)
Peak Diode Recovery voltage slope
4.5
V/ns
T
stg
Storage Temperature
55 to 150
°C
T
j
Max. Operating Junction Temperature
Rthj-case
Thermal Resistance Junction-case
Max
1.38
°C/W
Rthj-amb
Thermal Resistance Junction-ambient
Max
62.5
°C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300
°C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
9
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
155
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs=± 1mA (Open Drain)
30
V
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STP12NK30Z
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
DYNAMIC
SWITCHING
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80%
V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 1 mA, V
GS
= 0
300
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 °C
1
50
µA
µA
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= ± 20V
±10
µA
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 50µA
3
3.75
4.5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10V, I
D
= 4.5 A
0.36
0.4
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
= 10 V
,
I
D
= 4.5 A
5.4
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
670
125
28
pF
pF
pF
C
oss eq.
(3)
Equivalent Output
Capacitance
V
GS
= 0V, V
DS
= 0V to 440 V
70
pF
R
G
Gate Input Resistance
f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
3.6
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
r
t
d(off)
t
f
Turn-on Delay Time
Rise time
Turn-off Delay Time
Fall Time
V
DD
= 150 V, I
D
= 4.5 A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
16
20
36
10
ns
ns
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 240V, I
D
= 9 A,
V
GS
= 10V
25
5.5
13.4
35
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
9
36
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 9 A, V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 9 A, di/dt = 100A/µs
V
DD
= 40V, T
j
= 150°C
(see test circuit, Figure 5)
165
0.9
11.2
ns
µC
A
STP12NK30Z
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Thermal Impedance For TO-220
Safe Operating Area For TO-220
Static Drain-source On Resistance
Transfer Characteristics
Output Characteristics
Transconductance
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STP12NK30Z
Normalized Gate Thereshold Voltage vs Temp.
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temperature
Normalized BVDSS vs Temperature
Capacitance Variations
Gate Charge vs Gate-source Voltage
STP12NK30Z
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Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
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STP12NK30Z
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
C
1.23
1.32
0.048
0.051
D
2.40
2.72
0.094
0.107
D1
1.27
0.050
E
0.49
0.70
0.019
0.027
F
0.61
0.88
0.024
0.034
F1
1.14
1.70
0.044
0.067
F2
1.14
1.70
0.044
0.067
G
4.95
5.15
0.194
0.203
G1
2.4
2.7
0.094
0.106
H2
10.0
10.40
0.393
0.409
L2
16.4
0.645
L4
13.0
14.0
0.511
0.551
L5
2.65
2.95
0.104
0.116
L6
15.25
15.75
0.600
0.620
L7
6.2
6.6
0.244
0.260
L9
3.5
3.93
0.137
0.154
DIA.
3.75
3.85
0.147
0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
STP12NK30Z
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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© 2002 STMicroelectronics - Printed in Italy - All Rights Reserved
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