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Part Number ST19WP18

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1/5
DATA BRIEF
May 2004
For further information contact your local ST sales office.
ST19WP18
Trusted Platform Module (TPM)
5
PRODUCT FEATURES
I
SINGLE-CHIP TRUSTED PLATFORM
MODULE (TPM)
I
EMBEDDED TPM 1.2 FIRMWARE
I
FULL TPM SOLUTION WITH COMPLETE
TCG COMPLIANT SOFTWARE STACK
LAYERS
I
33-MHz LOW PIN COUNT (LPC)
INTERFACE V1.1
I
COMPLIANT WITH TCG PC CLIENT
SPECIFIC TPM IMPLEMENTATION
SPECIFICATION (TIS) V1.2
I
DEDICATED LPC COMMUNICATION
BUFFER FOR TPM COMMANDS HANDLING
OPTIMIZATION
I
TRUSTED COMPUTING GROUP (TCG)
(1)
V1.1B / V1.2 CONFIGURABLE MODE OF
OPERATIONS
I
ARCHITECTURE BASED ON ST19W
SECURE SMARTCARD IC PLATFORM:
­
1088-bit Modular Arithmetic Processor
providing Full support for Asymmetric
operations
­
Hardware-based SHA-1 accelerator
enabling BIOS related fast hash
operations
­
FIPS 140-2 compliant Random Number
Generator
­
Active security sensors
I
EEPROM-BASED NVM INCLUDING 128
BYTES OF OTP AREA FOR PRODUCTION
CONFIGURATION
­
Highly reliable CMOS EEPROM
submicron technology
­
10 year data retention
­
500,000 Erase/Write cycle endurance
­
Storage for up to 30 keys
I
5 SOFTWARE-CONTROLLED GENERAL
PURPOSE I/O (GPIO) PINS
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POWER SAVING MODE
I
AVAILABLE IN RECOMMENDED TCG PC
CLIENT 1.2 COMPATIBLE TSSOP28
I
3.3V ± 10% POWER SUPPLY VOLTAGE
I
0-70
o
C OPERATING TEMPERATURE
RANGE
Figure 1. Delivery Form
1. TCG website: http://www.trustedcomputinggroup.org
Function
Speed
(1)
1.
Typical values, independent of external clock frequency and
supply voltage.
RSA 1024 bits signature with CRT
(1)
62 ms
RSA 1024 bits signature without CRT
(2)
2.
CRT: Chinese Remainder Theorem.
206 ms
RSA 1024 bits verification (e='$10001')
4 ms
RSA 1024 bits key generation
1.8 s
RSA 2048 bits signature with CRT
(2)
416 ms
RSA 2048 bits verification (e='$10001')
66 ms
TSSOP28
ST19WP18
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GENERAL DESCRIPTION
The ST19WP18 is a cost effective Trusted Plat-
form Module (TPM) solution. The ST19WP18 is
designed to provide PC platforms with enhanced
security and integrity mechanisms as defined by
Trusted Computing Group standards. The product
provides full support of TCG v1.1b as well as TCG
v1.2 specifications
The ST19WP18 is driven from the Smartcard IC
ST19W platform. It is manufactured using the ad-
vanced highly reliable STMicroelectronics CMOS
EEPROM technology.
The ST19WP18 has an 8-bit CPU architecture
and includes the following on-chip memories:
User ROM, User RAM and EEPROM with state of
the art security features. ROM, RAM and EEP-
ROM memories can be configured into partitions
with customized access rules.
The ST19WP18 also includes a Modular Arithme-
tic Processor (MAP). The 1088 bits architecture of
this cryptographic engine allows processing of
modular multiplication, squaring and additional
calculations up to 2176 bit operands.
The Modular Arithmetic Processor is designed to
speed up cryptographic calculations using Public
Key Algorithms.
The Secure Hash Accelerator allows fast SHA-1
computation especially well suited for BIOS hash
operations during early boot stages.
The ST19WP18 has been specially designed in
line with TCG PC Client Specific TPM Implemen-
tation Specification (TIS) referring to Intel's LPC
Specification revision 1.0.
Figure 2. Block Diagram
INTERNAL BUS
MEMORY ACCESS FIREWALL
I/O0
1 x
Serial
interface
Gnd 2
8 bit
CPU
3 x
8 bit
Timers
CRC
module
CLK
Clock
Generator
module
ST ROM, MAP and DES FIREWALL
RAM
User ROM
ST ROM, RF
and Crypto
Libraries
EDES
Accelerator
MAP
1088 bits
514
Vcc 2
Gun A
&
Gun B
Security
Admin.
RESET
EEPROM
SHA
Module
5 x
General
purpose
I/Os
interface
Gpi/0
RAM 2K
LPC
interface
LFrame LPCPD
Lad3
Lad2
Lad1
Lad0
PP
SERIRQ
VBAT
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ST19WP18
SOFTWARE DESCRIPTION
Embedded firmware
The ST19WP18 includes fully compliant TCG
v1.1b firmware which supports features like cryp-
tographic key generation, integrity metrics and se-
cure storage. In addition, the product is TCG v1.2
ready and provides support for functions such as
Delegation, Transport session and Locality.
This TCG v1.1b / v1.2 compliant firmware uses an
optimized and flexible software architecture allow-
ing the integration of Trusted Computing Frame-
work enhancements or implementation of dedicat-
ed functions.
TCG Software Stack
The ST19WP18 provides complete system soft-
ware layers, fully compliant with TCG Trusted
Software Stack specification.
Microsoft Windows
TM
2000/XP operating systems
are supported. Please contact ST for a complete
list of supported operating systems. The embed-
ded firmware plus additional modules bring OEMs
a complete TPM solution for their PC platforms.
The software stack comprises the following mod-
ules:
­
BIOS Memory Absent driver (MA)
­
BIOS Memory Present driver (MP)
­
TPM Device Driver (TDD)
­
TPM Device Driver Library (TDDL)
­
TSS Core Services (TCS)
­
TSS Service Provider (TSP)
Cryptographic infrastructure interface
Secure and trustworthy functions of the
ST19WP18 module are made available to applica-
tions through cryptographic Application Program-
ming Interfaces (APIs) compliant either to
PKCS#11standard or to the MS CAPI specifica-
tion. An ST19WP18 ready Cryptographic Service
Provider (CSP) can then be used to enhance Op-
erating System security policies or applications se-
curity plug-ins which take full advantage of the
secure TPM functionalities such as sealed stor-
age, key generation, signature and encryption.
Figure 3. Software Layers
Application 1
Application 3
Application 2
MS CAPI
CSP
PKCS#
CSP
Cryptographic
Infrastructure Interface
TSP Interface
OS User
Mode
TSS Service Provider
TSS Core Services
TPM Device Driver Library
TCS Interface
TDDL Interface
TPM Device Driver
ST19WP18 - TPM
OS Kernel
Mode
Hardware
ai09876
TPM BIOS
MA Driver
TPM BIOS
MP Driver
System Processes
User Processes
ST19WP18
4/5
PIN AND SIGNAL OVERVIEW
Figure 4. Pinout description
Table 1. Signal description
Signal
Type
Description
LAD[3:0]
Bidir
Multiplexed Command, Address and Data (see LPC Interface Spec)
LPCPD#
Input
Power Down indicates that the peripheral should prepare for power to be removed
from the LPC i/F devices. Actual power removal is system dependent (see LPC Inter-
face Spec)
LCLK
Input
Clock Same 33Mhz clock as PCI clock on the host. Same clock phase with typical PCI
skew. (see LPC Interface Spec)
LFRAME#
Input
Frame indicates start of a new cycle, termination of broken cycle (see LPC Interface
Spec)
LRESET#
Input
Reset same as PCI Reset on the host (see LPC Interface Spec)
SERIRQ
Bidir
Serialized IRQ is used by TPM to handle interrupt support (see LPC Interface Spec)
GPIO5/CLKRUN#
Bidir
General Purpose IO, weak internal pull-up fully configurable by Software
CLKRUN# same as PCI CLKRUN#. Only needed by peripherals that need DMA or bus
mastering in a system that can stop the PCI bus (generally in mobile systems)
PP
Input
Physical Presence, active high, internal pull-down. Used to indicate Physical Pres-
ence to the TPM
GPIO[4:1]
Bidir
General Purpose IOs with weak internal pull-up fully configurable by Software
IO
Bidir
Bidirectional IO ISO 7816-2 compliant serial port
VPS
Input
3.3v Power supply. VPS has to be connected to 3.3v DC power rail supplied by the
motherboard
GND
Input
Zero volts ground reference. GND has to be connected to the main motherboard
ground
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GPIO1
GPIO2
IO
GND
NC
GPIO3
PP
NC
GPIO4
VPS
GND
NC
NC
NC
LPCPD#
SERIRQ
LAD0
NC
VPS
LAD1
LFRAME#
LCLK
LAD2
NC
GPIO5/CLKRUN#
LRESET#
GND
LAD3
TSSOP28
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ST19WP18
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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All other names are the property of their respective owners.
© 2004 STMicroelectronics - All rights reserved
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