ChipFind - Datasheet

Part Number L9949

Download:  PDF   ZIP
1/20
L9949
September 2002
s
ONE FULL BRIDGE FOR 6A LOAD (r
on
= 150m
)
s
THREE HALF BRIDGES FOR 1.6A LOAD
(r
on
= 800m
)
s
ONE HIGHSIDE DRIVER FOR 6A LOAD
(r
on
= 100m
)
s
VERY LOW CURRENT CONSUMPTION IN
STANDBY MODE (I
S
< 6µA, typ. Tj
85°C)
s
SERIAL PERIPHERAL INTERFACE (SPI) TO
MICROCONTROLLER
s
ALL OUTPUTS SHORT CIRCUIT PROTECTED
s
CURRENT MONITOR OUTPUT FOR FULL
BRIDGE AND HIGHSIDE DRIVER
s
ALL OUTPUTS OVER TEMPERATURE
PROTECTED
s
OPEN LOAD DIAGNOSTIC FOR ALL OUTPUTS
s
OVERLOAD DIAGNOSTIC FOR ALL OUTPUTS
APPLICATIONS
s
FOR AUTOMOTIVE APPLICATIONS, E.G.
FULL BRIDGE FOR DOOR LATCH OR
MIRROR RETRACT, HALF BRIDGES FOR
MIRROR AXIS CONTROL AND HIGH-SIDE
DRIVER FOR MIRROR DEFROSTER
DESCRIPTION
The L9949 is a microprocessor controlled power in-
terface for automotive applications. It is realized in
multipower BCD60III technology. Up to three DC mo-
PowerSO20
ORDERING NUMBER: L9949
DOOR ACTUATOR DRIVER
MULTIPOWER BCD60III TECHNOLOGY
BLOCK DIAGRAM
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
SPI
Dr
iv
er Interf
ace & Diagnostic
DI
DO
CLK
CSN
CM
Full bridge
Half bridge
Half bridge
Highside driver
µ
C
M
M
M
Ground
e.g. for mirror retract
or door latch
e.g. for mirror
axis control
e.g. for mirror
defroster
MUX
V (battery)
S
V
CC
L9949
2/20
tors and one grounded resistive load can be driven with its three half bridges, one full bridge and one highside
driver power outputs. The integrated standard serial peripheral interface (SPI) controls all operation modes (for-
ward, reverse, brake and high impedance). All diagnostic informations are available via the SPI.
Dual Power Supply: V
S
and V
CC
The power supply voltage V
S
supplies the full bridge, the half bridges and the highside driver. An internal
charge-pump are used to drive the highside switches. The logic supply voltage V
CC
(stabilized 5V) is used for
the logic part and the SPI of the device. Due to the independent logic supply voltage the control and status in-
formation will not be lost, if there are temporary spikes or glitches on the power supply voltage. In case of power-
on (V
CC
increases from undervoltage to V
VCC OFF
= 4.2V) the circuit is initialized by an internally generated
power-on-reset (POR). If the voltage V
CC
decreases under the minimum threshold (V
VCC ON
= 3.4V), the out-
puts are switched to tristate (high impedance) and the status registers are cleared.
Standby-Mode
The standby mode of the L9949 is activated by setting the bits 12 and 13 of the Input Data Register to zero. All
latched data will be cleared and the inputs and outputs are switched to high impedance. In the standby mode
the current at V
S
(V
CC
) is less than typ. 6µA (40µA) for CSN = high (DO in tristate). By switching the V
CC
voltage
a very low quiescent current can be achieved. If one of the bits 12 and 13 are set to high, the device will be
switched to active mode.
Inductive Loads
Each half bridge is built by internally connected highside and a lowside power DMOS transistor. Due to the built-
in reverse diodes of the output transistors inductive loads can be driven at the outputs OUT1 to OUT5 without
external free-wheeling diodes. The highside driver OUT6 is intended to drive resistive loads only hence only a
limited energie (E<1mJ ) can be dissipated by the internal ESD-diode in freewheeling condition. For inductive
loads (L>100
µ
H) an external free-wheeling diode connected to GND and OUT6 is needed.
Diagnostic Functions
All diagnostic functions (over/open load, power supply over-/undervoltage, temperature warning and thermal
shutdown) are internally filtered and the condition has to be valid for at least 10µs (0.5ms, respectively) before
the corresponding status bit in the status registers will be set. The filters are used to improve the noise immunity
of the device. The open load and temperature warning function are intended for information purpose and will
not change the state of the output drivers. In contrast, the overload and thermal shutdown condition will disable
the corresponding driver (overload) or all drivers (thermal shutdown), respectively. The microcontroller has to
clear the status bits to reactivate the corresponding drivers. This is to avoid an uncontrolled switching behaviour
of the device which may result in a heavy noise on the GND and V
S
lines in case of an fault condition (e.g. short
to GND or V
S
).
Overvoltage and Undervoltage Detection
If the power supply voltage V
S
rises above the overvoltage threshold V
SOV OFF
(max. 22V), the outputs OUT1
to OUT6 are switched to high impedance state to protect the load. If the supply voltage recovers to normal op-
erating voltage, the device will return to the programmed state (lockout bit 14 = 0). When the voltage V
S
drops
below the undervoltage threshold V
SUV OFF
(min. 6V), the output stages are switched to high impedance to
avoid the operation of the power devices without sufficient gate driving voltage (increased power dissipation). If
the supply voltage V
S
and the internal charge-pump recovers to normal operating voltage the system returns to
the programmed state (lockout bit 14 = 0). If the lockout bit 14 is set, the automatic turn-on of the drivers is de-
activated. The microcontroller needs to clear the status bits to reactivate the drivers.
DESCRIPTION (continued)
3/20
L9949
Temperature Warning and Thermal Shutdown
When the junction temperature rises above T
j TW
a temperature warning flag is set and is available via the SPI.
If the junction temperature increases above the second threshold T
j SD
, the thermal shutdown bit will be set and
the power DMOS transistors of the output stages are switched off to protect the device. In order to reactivate
the output stages the junction temperature must decrease below T
j SD
- T
j SD HYS
and the thermal shutdown bit
has to be cleared by the microcontroller.
Open Load Detection
The open load detection monitors the voltage drop of current sense resistors in each highside and lowside driver
of the output stage. The output signal of an open load comparator has to be valid for at least 0.5 ms (t
dOL
) to
set the open load bit (bit 1-11) in the status register 1.
Over Load Detection
In the case of an overcurrent condition an overcurrent flag (bit 1-11) is set in the status register 0 in the same
way as open load detection. If the overcurrent signal is valid for at least t
ISC
= 10µs, the overcurrent flag is set
and the corresponding driver is switched off to reduce the power dissipation and to protect the integrated circuit.
The microcontroller has to clear the status bits to reactivate the corresponding driver.
Current monitor
The current monitor output sources a current image at the current monitor output which has a fixed ratio (1/
10000) of the instantaneous current of the selected highside driver. The bits 12 and 13 of the Input Data register
controls which of the outputs OUT1, OUT2 and OUT6 will be multiplexed to the current monitor output. The cur-
rent monitor output allows a more precise analyse of the actual state of the load rather than the detection of an
open- or overload condition. For example this can be used to detect the motor state (free-running, loaded or
blocked) or the temperature of the heating element.
Figure 1. Pin Connection (Top view)
GND
OUT1
VS
DI
CLK
OUT5
VS
OUT4
OUT3
OUT6
VS
DO
VCC
CM
CSN
VS
OUT2
GND
10
8
9
7
6
5
4
3
2
13
14
15
16
17
19
18
20
12
1
11
GND
GND
D99AT455Amod
L9949
4/20
PIN FUNCTION
Pin
Description
1, 10,
11, 20
GND
Ground:
Reference potential
Important:
For the capability of driving the full current at the outputs all pins of GND must be
externally connected !
5, 8, 13,
18
V
S
Power supply voltage (battery):
For this input a ceramic capacitor as close as possible to GND is recommended.
Important:
For the capability of driving the full current at the outputs all pins of V
S
must be
externally connected !
15
V
CC
Logic supply voltage:
For this input a ceramic capacitors as close as possible to GND are recommended.
14
CSN
Chip Select Not input:
This input is low active and requires CMOS logic levels. The serial data transfer between L9949
and micro controller is enabled by pulling the input CSN to low level. If an input voltage of more
than 9.6V above VCC is applied to CSN pin the L9949 will be switched into a test mode.
6
CLK
Serial clock input:
This input controls the internal shift register of the SPI and requires CMOS logic levels.
7
Data In
Serial data input:
The input requires CMOS logic levels and receives serial data from the microcontroller. The data
is an 16bit control word and the least significant bit (LSB, bit 0) is transferred first.
17
Data Out Serial data output:
The diagnosis data is available via the SPI and this tristate-output. The output will remain in
tristate, if the chip is not selected by the input CSN (CSN = high)
16
CM
Current monitor output:
Depending on the multiplexer bits 12 and 13 of the Input Data register this output sources an
image of the instant current through the corresponding highside driver with a ratio of 1/10000
9
OUT1
Halfbridge-output 1:
The output is built by a highside and a lowside switch, which are internally connected. The
output stage of both switches is a power DMOS transistor. Each driver has an internal parasitic
reverse diode (bulk-drain-diode, highside driver from OUT1 to V
S
, lowside driver from GND to
OUT1). This output is overcurrent and open load protected.
12
OUT2
Halfbridge-output 2:
see OUT1 (pin 9)
2
OUT3
Halfbridge-output 3:
The output is built by a highside and a lowside switch, which are internally connected. The
output stage of both switches is a power DMOS transistor. Each driver has an internal parasitic
reverse diode (bulk-drain-diode, highside driver from OUT3 to VS, lowside driver from GND to
OUT3). This output is overcurrent and open load protected.
3
OUT4
Halfbridge-output 4:
see OUT3 (pin 2)
4
OUT5
Halfbridge-output 5:
see OUT3 (pin 2)
19
OUT6
Highside-driver-output 6:
The output is built by a highside switch and can be used only for a resistive load, because the
internal reverse diode from GND to OUT6 is missing. This highside switch is a power DMOS
transistor with an internal parasitic reverse diode from OUT6 to V
S
(bulk-drain-diode). The output
is overcurrent and open load protected.
5/20
L9949
ABSOLUTE MAXIMUM RATINGS
Note: All maximum ratings are absolute ratings. Leaving the limitation of anyone of these values may cause an irreversible damage of the
integrated circuit!
ESD PROTECTION
THERMAL DATA
Temperature warning and thermal shutdown:
Symbol
Parameter
Value
Unit
V
S
DC supply voltage
-0.3...28
V
single pulse t
max
< 400 ms
40
V
V
CC
stabilized supply voltage, logic supply
-0.3 to 6
V
V
DI
V
DO
V
CLK
,
V
CSN
digital input / output voltage
-0.3 to V
CC
+ 0.3
V
V
CM
current monitor output
-0.3 to V
CC
+ 0.3
V
I
OUT1,OUT2,
OUT6
output current
±10
A
I
OUT3,OUT5
output current
±5
A
Parameter
Value
All pins
±2
(1)
(1)
HBM according to MIL 883C, Methode 3015.7 or EIA/JESD22-A114-A
kV
output pins: OUT1 ­ OUT6
±4
(2)
(2)
HBM with all unzapped pins grounded
kV
Symbol
Parameter
Value
Unit
Operating junction temperature:
T
j
Operating Junction Temperature
-40 to 150
°C
Symbol
Parameter
Min.
Typ.
Max.
Unit
T
jTW ON
Temperature Warning Threshold
Junction Temperature
T
j
increasing
150
°C
T
jTW OFF
Temperature Warning Threshold
Junction Temperature
T
j
decreasing
120
°C
T
jTW HYS
Temperature Warning Hysteresis
10
K
T
jSD ON
Thermal Shutdown Threshold
Junction Temperature
T
j
increasing
180
°C
T
jSD OFF
Thermal Shutdown Threshold
Junction Temperature
T
j
decreasing
150
°C
T
jSD HYS
Thermal Shutdown Hysteresis
10
K