E01Y22A2Z-PS

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

CXB1828ER

32 pin VQFN (Plastic)

2.5Gbps Laser Diode Driver

Description

The CXB1828ER is a high-speed monolithic laser

diode driver. This IC can drive the data rate of 2.5Gbps
and the modulation current of up to 50mA. The bias
current of up to 50mA can be supplied and it is
controlled by the built-in APC (automatic power
control). The modulation current and bias current are
designed to be linearly controlled by the voltage input
to the control pin.

This IC has a built-in DFF, and through mode or DFF

mode can be selected. In through mode the signal
goes as it is, and in DFF mode the input signal is
retimed by the external clock. The data input pin and
the clock input pin can accept the differential input of
PECL and CML, and the 50

termination resistors are

provided in the IC.

The shutdown function which shuts down the

modulation current and bias current, the activity error
detect circuit which detects that the signal has no
input, and the alarm output power-on reset circuit.
Furthermore, the duty cycle control circuit which
corrects the modulation output signal duty is
included in this IC.

The CXB1828ER employs the 4.8mm

4.8mm

of 32-pin plastic package, contributing to the
miniaturization of the optical mode.

Features
· Direct laser diode drive
· Maximum data rate of 2.5Gbps
· Power-on reset function
· Automatic power control (APC) for bias current
· Alarm function and shutdown function
· Differential PECL and CML inputs or AC coupled

input

· Internal duty cycle correction circuit
· Activity error detector function for laser safety
· Typical rise time is 80ps.
· Built-in 50

input termination resistor

· Compact package size: 4.8mm

4.8mm

· Single +3.3V supply voltage

Applications
· Gigabit ethernet: 1.25Gbps
· SONET/SDH: 622Mbps, 2.5Gbps

Sony

CXB1828ER

Sony

SerDes

Laser Diode

Transmit Path

Typical Transmit Block Diagram

Absolute Maximum Ratings
· Supply voltage

Vcc V

0.3 to +6.0

· Data and clock input voltage difference

2.5

· Bias output current

100

· Modulation output current

100

· Storage temperature

Tstg

65 to +150

°C

Recommended Operating Conditions
· Supply voltage

Vcc V

3.14 to 3.46

· Operating ambient temperature

40 to +85

°C

Important Notes
The IC requires SLOW turning power on and off.
See Vcc rise and fall time in AC characteristics.

Electrostatic Strength
This IC has a very sensitive electrostatic strength,
so care should be taken for handling.

CXB1828ER

Block Diagram

10k

Vcc 1.4V

10k

Vcc 1.4V

50:1

BIAS

BIAS_SET

OP_OUT

OP_IN

VREF

MOD_SET

RREF

Duty

Control

Activity Error

Detector

Vcc

Voltage Error

Det.

Time

Stretcher

Vref Gen.

High

Low

MUX

1.8V

0.3V

kill

50:1

15k

Vref 1.1V

60k

kill

Vref

Gen 1.9V

to Modulation/Bias Control

THR

UMODE

DUTY

MOD_MON

BIAS_MON

DIN

DINB

AED_CAP

AED_DISABLE

WCVH

WCVL

TIME_CAP

ALARM

SHUTDOWNB

SHUTDOWN

CKIN

CKINB

Pin Assignment

24 23 22 21 20 19 18 17

DIN

DUTY

THR

UMODE

AED_DISABLE

TIME_CAP

AED_CAP

MOD_MON

BIAS_MON

SHUTDO

WNB

SHUTDO

ALARM

RREF

VREF

MOD_SET

BIAS_SET

DINB

CKIN

CKINB

WCVH

WCVL

BIAS

OP_IN

OP_OUT

CXB1828ER

Pin Description

No.

Symbol

Typical pin

voltage (V)

Description

I/O

Equivalent circuit

Vcc2

10k

Vcc2

3.3

Positive power supply.

SHUTDOWNB

0 or Vcc

TTL input.
The modulation current and bias
current is shut down by inputting
the Low voltage to this pin. High
level when open.

SHUTDOWN

0 or Vcc

TTL input.
The modulation current and bias
current is shut down by inputting
the High voltage to this pin. High
level when left open.

ALARM

TTL output.
High when the abnomality is
detected from the OP_IN pin
voltage. The abnormal voltage of
OP_IN is Vop < 0.3V or Vop > 1.8V.

RREF

Connect an external resistor of
18k

between this pin and Vcc.

CXB1828ER

No.

Symbol

Typical pin

voltage (V)

Description

I/O

Equivalent circuit

Vcc2

26.4K

Vcc2

150k

Vcc2

VREF

1.9

OP_OUT

MOD_SET

0.2 to 2.0

BIAS_SET

0.2 to 2.0

OP_IN

0.3 to 1.8

Reference voltage output.
GND reference 1.9V.

Internal operational amplifier
output.
Used for the bias current
automatic power control (APC).
The OP_OUT pin is connected to
the BIAS_SET pin. Connect a
0.1µF capacitor between this pin
and GND.

Modulation current control.
The modulation current is
controlled by this pin voltage.

Bias current control.
The bias current is controlled by
the voltage of this pin.

The internal operational amplifier
input for the bias current automatic
power control (APC).

CXB1828ER

No.

Symbol

Typical pin

voltage (V)

Description

I/O

Equivalent circuit

Current
Source

1 (MOD_MON)

O2 (BIAS_MON)

Current
Source

BIAS

Laser bias current output.

Negative power supply for the
modulation and bias output.

Negative power supply for the
modulation output.

Laser modulation current output.
Open collector output.

Complementary current output.
Connect the laser diode not to this
pin, but to the Q pin.

VccO

3.3

Positive power supply for the
modulation output.

BIAS_MON

Bias current monitor.
1/50 of the bias current flows
to this pin. This pin is connected to
Vcc either through a resistor 1k

or directly.

MOD_MON

Modulation current monitor.
1/50 of the modulation current
flows to this pin. This pin is
connected to Vcc either through a
resistor 1k

or directly.

CXB1828ER

No.

Symbol

Typical pin

voltage (V)

Description

I/O

Equivalent circuit

Vcc2

30pF

500

Vcc2

30pF

500

Vcc2

10k

Vcc2

10k

AED_CAP

Capacitor connection for the
activity error detector. If the active
detector function is not required,
this pin can be left open.
When a capacitor is connected
between the AED_CAP pin and
Vcc, the time till the error is
detected can be extended.

TIME_CAP

Capacitor connection for the alarm
power-on reset.
The period of the power-on reset
time is controlled by a capacitor
(recommended value is 0.01µF)
connected between the TIME_CAP
pin and GND.
If the ALARM function is not
required, this pin can be left open.

AED_DISABLE

TTL input.
This pin controls the activity error
detector circuit.
When High (open or connected to
Vcc), the activity error detector
function is disabled. When Low
(connected to GND), the activity
error detector function is enabled.

THRUMODE

TTL input.
When High (open or connected to
Vcc), the input data goes not
through the D flip-flop.
When Low (connected to GND),
the serial input data goes through
the D flip-flop within the chip.

CXB1828ER

No.

Symbol

Typical pin

voltage (V)

Description

I/O

Equivalent circuit

Vcc1

300

Vcc1

10k

Vcc1

10k

Vcc2

36k

DUTY

Resistor connection for the duty
cycle control.
When an external resistor is
connected between the DUTY pin
and GND, the modulation pulse
width can be expanded.

Negative power supply.

DIN

PECL

CML

Differential PECL and CML data
inputs.
These two inputs are internally
connected by 100

and biased by

10k

to Vcc 1.4V.

DINB

Negative power supply.

Vcc1

3.3

Positive power supply.

CKIN

PECL

CML

Differential PECL and CML clock
inputs.
These two inputs are internally
connected by 10k

and biased by

10k

to Vcc 1.4V.

CKINB

WCVH

1.8

Window comparator's higher
threshold voltage for ALARM.
The default high alarm assert
voltage for the comparator is 1.8V.

CXB1828ER

Electrical Characteristics

DC Characteristics

(Vcc V

= 3.14 to 3.46V, Ta = 40 to +85°C)

DC power supply voltage

Supply current
(DATA THRU MODE)

Supply current (D-FF MODE)

Maximum modulation output
current

Minimum modulation output
current

Modulation output voltage range

Maximum bias output current

Minimum bias output current

Bias output voltage range

Modulation shutdown current

Bias shutdown current

DIN, CKIN input High voltage
(PECL)

DIN, CKIN input Low voltage
(PECL)

DIN, CKIN differential input
voltage (CML)

Internal resistance between
DIN and DINB, CKIN and CKINB

Internal input reference voltage at
DIN, DINB, CKIN, CKINB

TTL input High voltage

TTL input Low voltage

TTL input current High

TTL input current Low

ALARM output High voltage

ALARM output Low voltage

VREF output voltage

WCVH output voltage

WCVL output voltage

Vcc voltage error detect voltage

Item

ICC_THRU

ICC_DFF

QMAX

QMIN

BMAX

BMIN

QSHD

BSHD

EIH

EIL

, R

EIR

TIH

TIL

TIH

TIL

TOH

TOL

REF

Vcc_err

Symbol

Vcc V

= 0mA, I

= 0mA

= 0mA, I

= 0mA

Iin = 0.4mA

Iin = 2.0mA

Iout = 0 to 500µA

Open voltage

Conditions

3.14

Vcc 2

Vcc

1.17

Vcc

1.84

400

2.0

0.3

250

2.4

1.80

1.70

0.28

2.59

Min.

3.46

Vcc

100

Vcc

0.81

Vcc

1.48

2000

130

Vcc +

0.3

0.8

Vcc

0.5

2.05

0.37

3.08

Max.

3.3

Vcc

1.37

Typ.

µA

mVp-p

µA

Unit

Since the internal input reference voltage may become lower than the Low level of ECL, input the signal

into DIN and CKIN by AC coupling at the time of a single phase input.

CXB1828ER

AC Characteristics

(Vcc V

= 3.14 to 3.46V, Ta = 40 to +85°C)

Maximum data rate

Maximum variable High pulse width
by duty cycle control

Rise time (20 to 80%)

Fall time (80 to 20%)

DIN CKIN setup time

DIN CKIN hold time

Vcc rise time

Vcc fall time

Item

fdmax

delay

vccr

vccf

Symbol

Data rate = 2.5Gbps

= 50mA, RL = 25

Rise and fall time of
input = 130ps

10 to 90%

90 to 10%

Conditions

2.488

100

Min.

Max.

Typ.

Gbps

Unit

DC/AC Characteristics for the APC Circuit

(Vcc V

= 3.14 to 3.46V, Ta = 40 to +85°C)

OP_IN input voltage range

OP_OUT output maximum voltage

OP_OUT output minimum voltage

Minimum OP_OUT output voltage
at shutdown condition

OP_IN input current

OP_OUT output source current

OP_OUT output sink current

APC operational amplifier gain

Monitor photodiode current range

Item

I_OP

O_OPMAX

O_OPMIN

O_OPSDN

I_OP

O_OPSORC

O_OPSINK

MPD

Symbol

Conditions

0.2

2.0

Min.

2.0

0.2

1000

Max.

Fig. 15

Typ.

µA

Unit

Setup time, Hold time

Min.: 200mV for each input
Max.: 1000mV for each input

DIN

CKIN

CXB1828ER

Functional Block Description

APC (Automatic power control)

The APC loop consists of the laser driver and APC operational amplifier. The APC operational amplifier is

configured as an inverting integrator. It is the input voltage that is derived from the monitor current by the

monitor photodiode and an external resistor R

to OP_IN.

The input voltage is inverted and the output from OP_OUT. The bias current is controlled by inputting the

output to the BIAS_SET pin. The bias current is set by R

. A capacitor C

with a value of 1000pF works for

stability and reduces the noise. Use C

APC

(recommended value 0.1µF) between the OP_OUT pin and V

APC

controls the rapid rise of the OP_OUT pin when the shutdown is cancelled, and suppresses the excess

current flowing to the laser diode.

CXB1828ER

Vcc

BIAS

Monitor PD

Vref_1.1V

1000pF

OP_IN

Modulation Current

Bias Current

CXB1828ER

APC Operational Amplifier

OP_OUT

15k

60k

APC

0.1µF

Fig.1. APC Function Block Diagram

Alarm function

This circuit is for the APC operation. When the input OP_IN is provided with an excess voltage or minimal

voltage, the window comparator output goes High, and this signal is latched resulting in the output of alarm

signal. The WCVH and WCVL pin voltages are the upper and the lower threshold values of the window

comparator for ALARM. The default value of WCVH is 1.8V and that of WCVL is 0.3V. If the voltage of OP_IN is

lower than WCVL or higher than WCVH, ALARM signal is asserted High. This alarm signal returns to Low only

by the Vcc power-on reset function. Power-on reset time (T

TIME

) is set by the external capacitor put between

the TIME_CAP pin and V

. (Refer to Fig. 8.) It is necessary for the alarm signal output to be Low forcibly

because the excess voltage or minimal voltage may be applied to the OP_IN pin till the APC operation completes.

The recommended value of the capacitor is 0.01µF.

Activity Error Detector

1.8V

0.3V

SHUTDOWN/SHUTDOWNB

Modulation/Bias Current OFF

ALARM

Operational Amplifier for APC

Monitor PD

Window Comparator

Time

Stretcher

RS-FF

Vcc

Voltage Error

Detector

TIME_CAP

TIME

0.01µF

OP_IN

Vcc > 2.9V

TIME

ALARM
ENABLE

Vcc < 2.9V

Vcc Voltage Error Detector

AED_DISABLE

SHUTDOWN

SHUTDOWNB

Modulation/Bias Current OFF

OUT

APC Settling

Alarm Reset

Fig.2. Alarm Function Block Diagram

Fig.3. Timing Chart of Alarm Function

CXB1828ER

Data input
The PECL/CML signal is input to the data buffer at a maximum data rate of 2.5Gbps. This input pin is biased
by the reference bias voltage (Vcc 1.4V) for the AC coupling input. An on-chip 100

resistor is put between

the DIN and DINB pins. The data buffer has the frequency detector and input amplitude voltage detector for the
Activity Error Detector (AED).

Clock input
The PECL/CML clock is input to the clock buffer at a maximum data rate of 2.5GHz. This input pin is biased by
the reference bias voltage (Vcc 1.4V) for the AC coupling input. An on-chip 100

resistor is put between the

CKIN and CKINB pins.

Signal duty cycle correction
The output pulse width can be extended as shown in Fig.9 by connecting an external resistor between the
DUTY pin and V

, and setting its resistor value from 0

to 4k

. The output pulse width can be extended up to

100ps (min.). Short the DUTY pin to V

when not want to vary the duty.

DUTY

0 to 4k

Fig.4. Duty Cycle Control

Bias current and modulation current control
The bias current and modulation current can be controlled linearly by the voltage input to the BIAS_SET and
MOD_SET pins as shown in Figs.10 and 11. The voltage applied to the BIAS_SET and MOD_SET pins can be
set by the external resistor between the VREF pin and V

. Refer to Fig.5.

BIAS_SET

10k

BIAS

MOD_SET

VREF

MOD

10k

Fig.5. Modulation/Bias Control

Bias current and modulation current monitor
This circuit monitors the bias and modulation current. The BIAS_MON and the MOD_MON pins should be
connected to V

either directly or through a resistor. The modulation current and monitor current are in the

rate of approximately 50:1. (Refer to Fig.12 and Fig.13.)

Thru-mode
When this pin is High or connected to Vcc, the input data goes not through the internal flip-flop. If this pin is
grounded the input data goes through the D flip-flop.

CXB1828ER

Shutdown function

This circuit disables the output current, that is, the bias and modulation current is turned off and used to shut

off the laser. And the voltage of OP_OUT is set to V

. The function block diagram for all of the shutdown

mechanism for the circuit is shown in Fig.6. The shutdown functions when one of the following conditions is met.

1) SHUTDOWN is High.

2) SHUTDOWNB is Low.

3) The activity error detector detects an error of the DIN/DINB input signal.

4) The voltage error detector detects Vcc is below 2.59 to 3.08V.

(

The bias current may flow at approximately Vcc = 2.0V.)

SHUTDOWN

SHUTDOWNB

DIN/DINB

AED_CAP

AED_DISABLE

TIME_CAP

Input Buffer

Alarm Reset

Modulation/Bias Current OFF,
The voltage of OP_OUT is set to V

Activity Error

Detector

Time

Stretcher

Vcc

Voltage Error

Detector

Fig.6. Shutdown Function Block Diagram

Activity error detect function

The activity error detect circuit monitors the DIN/DINB input signal, and shuts down the output current when

this circuit determines that the input data signal has no input. The conditions where the input signal is

determined to be no signal are when the input data signal logic is not varied over a period of the time set by

the user and when the voltage swing is too small (< 100mVpp-diff). Either of these conditions is met, the

shutdown circuit is enabled and the modulation current and laser bias current are shut down.

If needed, the time till the activity error detect can be extended. Fig.14 shows the graphs of the activity error

detection time (T

AED

) vs. C

AED

. When the activity error detect function is not required, connect the AED_DISABE

pin to V

or leave it the pin open.

Signal Loss

OUT

DIN/DINB

AED_DISABLE

Active Error Detector

AED

Fig.7. Timing Chart of AED Function

CXB1828ER

AC Electrical Characteristics Measurement Circuit

10k

Vcc 1.4V

10k

Vcc 1.4V

0.1µF

50:1

Duty

Control

Activity Error

Detector

Vcc

Voltage Error

Det.

Time

Stretcher

Vref Gen.

High

Low

MUX

1.8V

0.3V

kill

50:1

Vref 1.1V

15k

60k

kill

18k

Vref

Gen 1.9V

to Modulation/Bias Control

= 50

Oscillo-
scope
50

input

3.3V

Oscilloscope

10k

0 to 100k

10k

0 to 100k

0 to 4k

0.1µF

CXB1828ER

Application Circuit

Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

10k

Vcc 1.4V

10k

Vcc 1.4V

50:1

BIAS

BIAS_SET

OP_OUT

OP_IN

VREF

10k

MOD_SET

RREF

Vcc

18k

Duty

Control

DUTY

0 to 4k

Activity Error

Detector

Vcc

Voltage Error

Det.

Time

Stretcher

Vref Gen.

High

Low

MUX

1.8V

0.3V

TIME

0.01µF

kill

50:1

15k

Vref 1.1V

60k

kill

Vref

Gen 1.9V

to Modulation/Bias Control

THR

UMODE

DUTY

MOD_MON

BIAS_MON

DIN

DINB

AED_CAP

AED_DISABLE

WCVH

WCVL

TIME_CAP

ALARM

SHUTDOWNB

SHUTDOWN

CKIN

CKINB

AED

Vcc

APC

0.1µF

Ferrite
Bead

Laser
Diode

Monitor
Photodiode

1000pF

CXB1828ER

0.02

0.04

TIME

[µF]

Fig. 8. Power-on reset time (T

TIME

) vs. C

TIME

TIME

[ms]

0.06

0.08

0.10

160

140

120

100

DUTY

]

Fig. 9. Increment of output pulse width vs. R

DUTY

Amount of increases in pulse width time [ps]

500

1000

MOD_SET input voltage [mV]

Fig. 10. Modulation current vs.

MOD_SET input voltage

Modulation current [mA]

1500

2000

2500

Fig. 11. Bias current vs. BIAS_SET input voltage

Fig. 12. Ratio of modulation current (I

)

and modulation monitor current vs.
MOD_SET input voltage

Fig. 13. Ratio of bias current (I

)

and bias monitor current vs.
BIAS_SET input voltage

Ta = 40°C
Ta = +40°C
Ta = +85°C

500

1000

BIAS_SET input voltage [mV]

Bias current [mA]

1500

2000

2500

Ta = 40°C
Ta = +40°C
Ta = +85°C

500

1000

BIAS_SET input voltage [mV]

1500

2000

2500

Ta = 40°C
Ta = +40°C
Ta = +85°C

500

1000

MOD_SET input voltage [mV]

Ratio of modulation current and

modulation monitor current [mA]

Ratio of bias current and bias monitor current [mA]

1500

2000

2500

Ta = 40°C
Ta = +40°C
Ta = +85°C

Example of Representative Characteristics

CXB1828ER

100

200

AED

[pF]

Time base: 100.0ps/div

250mV/div

RL = 25

Ta = 25°C
I

= 30mA

Pattern = PRBS

Data Rate = 2.5Gbps

Fig. 14. Activity error detect time (T

AED

) vs.

AED

Fig. 16. Electrical Output Waveform

AED

(AED error detection time) [µs]

400

800

600

100

Ta = 40°C
Ta = +40°C
Ta = +85°C

3.0

2.8

2.6

2.4

2.2

2.0

1.8

1.6

1.4
1.2

1.0

0.8

0.6

0.4

0.2

0.4

OP_IN input voltage [V]

Fig. 15. OP_OUT output voltage vs.

OP_IN input voltage

OP_OUT output v

oltage [V]

0.8

1.6

1.2

0.2

0.6

1.4

1.8

1.0

2.0

Ta = 40°C
Ta = +40°C
Ta = +85°C

Time base: 100.0ps/div

FP LD (

= 1310nm)

Ta = 25°C
Pattern = PRBS

Data Rate = 2.5Gbps
Filter
Mask: OC-48

Fig. 17. Optical Output Waveform

Vcc = 3.3V

CXB1828ER

Package Outline Unit: mm

SONY CODE

EIAJ CODE

JEDEC CODE

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE MASS

EPOXY RESIN

SOLDER PLATING

COPPER ALLOY

PACKAGE STRUCTURE

VQFN-32P-04

32PIN VQFN (PLASTIC)

0.05g

2.3

4-R0.3

S A-B C

C 0.6

(0.15)

0.9 ±

0.7

0.05 S

0.6 ± 0.1

0.1

0.05 M S A-B C

0.4

4.8

4.4

1.4

PIN1 INDEX

45°

TERMINAL SECTION

0.2 ±

0.01

0.23 ±

Solder Plating

0.14 0.03

0.13 ± 0.025

+ 0.09

(Stand Off)

0.1

(0.39)

ranges of 0.1mm and 0.25mm from the end of a terminal.

NOTE: 1) The dimensions of the terminal section apply to the

2) The dimension of (

1) is apply to DiePad and the lead.

0.03 ±

0.03(

0.02

LEAD PLATING SPECIFICATIONS

ITEM

LEAD MATERIAL

COPPER ALLOY

SOLDER COMPOSITION

Sn-Bi Bi:1-4wt%

PLATING THICKNESS

5-18µm

SPEC.

SONY CODE

EIAJ CODE

JEDEC CODE

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE MASS

EPOXY RESIN

SOLDER PLATING

COPPER ALLOY

PACKAGE STRUCTURE

VQFN-32P-04

32PIN VQFN (PLASTIC)

0.05g

2.3

4-R

0.3

S A-B C

0.6

(0.15)

0.9 ±

0.7

0.05 S

0.6 ± 0.1

0.1

0.05 M S A-B C

0.4

4.8

4.4

1.4

PIN1 INDEX

45°

TERMINAL SECTION

0.2 ±

0.01

0.23 ±

Solder Plating

0.14 0.03

0.13 ± 0.025

+ 0.09

(Stand Off)

0.1

(0.39)

ranges of 0.1mm and 0.25mm from the end of a terminal.

NOTE: 1) The dimensions of the terminal section apply to the

2) The dimension of (

1) is apply to DiePad and the lead.

0.03 ±

0.03(

0.02

Sony Corporation

Part Number CXB1828ER