Philips Semiconductors
Objective specification
TrenchMOS
TM
transistor
PSMN009-100W
FEATURES
SYMBOL
QUICK REFERENCE DATA
· 'Trench' technology
· Very low on-state resistance
V
DSS
= 100 V
· Fast switching
· High thermal cycling performance
I
D
= 100 A
· Low thermal resistance
R
DS(ON)
9 m
GENERAL DESCRIPTION
PINNING
SOT429 (TO247)
N-channel
enhancement
mode
PIN
DESCRIPTION
field-effect power transistor in a
plastic envelope using 'trench'
1
gate
technology. The device has very
low
on-state
resistance.
It
is
2
drain
intended for use in dc to dc
converters and general purpose
3
source
switching applications.
tab
drain
The PSMN009-100W is supplied in
the SOT429 (TO247) conventional
leaded package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DSS
Drain-source voltage
T
j
= 25 °C to 175°C
-
100
V
V
DGR
Drain-gate voltage
T
j
= 25 °C to 175°C; R
GS
= 20 k
-
100
V
V
GS
Gate-source voltage
-
±
20
V
I
D
Continuous drain current
T
mb
= 25 °C
-
100
1
A
T
mb
= 100 °C
-
79
A
I
DM
Pulsed drain current
T
mb
= 25 °C
-
300
A
P
D
Total power dissipation
T
mb
= 25 °C
-
300
W
T
j
, T
stg
Operating junction and
- 55
175
°C
storage temperature
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
E
AS
Non-repetitive avalanche
Unclamped inductive load, I
AS
= 96 A;
-
1255
mJ
energy
t
p
= 0.2 ms; T
j
prior to avalanche = 25°C;
V
DD
50 V; R
GS
= 50
; V
GS
= 5 V
I
AS
Non-repetitive avalanche
-
100
A
current
d
g
s
2
3
1
1 Maximum continuous current limited by package.
February 1999
1
Rev 1.000
Philips Semiconductors
Objective specification
TrenchMOS
TM
transistor
PSMN009-100W
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R
th j-mb
Thermal resistance junction
-
0.5
K/W
to mounting base
R
th j-a
Thermal resistance junction
in free air
45
-
K/W
to ambient
ELECTRICAL CHARACTERISTICS
T
j
= 25°C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
V
(BR)DSS
Drain-source breakdown
V
GS
= 0 V; I
D
= 0.25 mA;
100
-
-
V
voltage
T
j
= -55°C
89
-
-
V
V
GS(TO)
Gate threshold voltage
V
DS
= V
GS
; I
D
= 1 mA
2.0
3.0
4.0
V
T
j
= 175°C
1.0
-
-
V
T
j
= -55°C
-
-
4.4
V
R
DS(ON)
Drain-source on-state
V
GS
= 10 V; I
D
= 25 A
-
8
9
m
resistance
T
j
= 175°C
-
-
25
m
I
GSS
Gate source leakage current V
GS
=
±
10 V; V
DS
= 0 V
-
2
100
nA
I
DSS
Zero gate voltage drain
V
DS
= 100 V; V
GS
= 0 V;
-
0.05
10
µ
A
current
T
j
= 175°C
-
-
500
µ
A
Q
g(tot)
Total gate charge
I
D
= 100 A; V
DD
= 80 V; V
GS
= 10 V
-
190
-
nC
Q
gs
Gate-source charge
-
35
-
nC
Q
gd
Gate-drain (Miller) charge
-
90
-
nC
t
d on
Turn-on delay time
V
DD
= 50 V; R
D
= 2
;
-
58
-
ns
t
r
Turn-on rise time
V
GS
= 10 V; R
G
= 5
-
133
-
ns
t
d off
Turn-off delay time
Resistive load
-
250
-
ns
t
f
Turn-off fall time
-
133
-
ns
L
d
Internal drain inductance
Measured from tab to centre of die
-
3.5
-
nH
L
d
Internal drain inductance
Measured from drain lead to centre of die
-
4.5
-
nH
L
s
Internal source inductance
Measured from source lead to source
-
7.5
-
nH
bond pad
C
iss
Input capacitance
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
-
7500
8000
pF
C
oss
Output capacitance
-
917
950
pF
C
rss
Feedback capacitance
-
508
550
pF
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
j
= 25°C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
I
S
Continuous source current
-
-
100
A
(body diode)
I
SM
Pulsed source current (body
-
-
300
A
diode)
V
SD
Diode forward voltage
I
F
= 25 A; V
GS
= 0 V
-
0.85
1.2
V
I
F
= 75 A; V
GS
= 0 V
-
1.1
-
V
t
rr
Reverse recovery time
I
F
= 20 A; -dI
F
/dt = 100 A/
µ
s;
-
200
-
ns
Q
rr
Reverse recovery charge
V
GS
= 0 V; V
R
= 30 V
-
1.5
-
µ
C
February 1999
2
Rev 1.000
Philips Semiconductors
Objective specification
TrenchMOS
TM
transistor
PSMN009-100W
MECHANICAL DATA
Dimensions in mm
Net Mass: 5 g
Fig.1. SOT429; pin 2 connected to mounting base.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for SOT429 envelope.
3. Epoxy meets UL94 V0 at 1/8".
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
SOT429
TO-247
97-06-11
0
10
20 mm
scale
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-247
SOT429
E
P
A
A1
w
M
b
1
2
3
e
e
b1
b2
c
Q
q
L
Y
R
D
S
L1
(1)
Note
1. Terminals are uncontrolled within zone L1.
UNIT
A1
D
b
E
e
w
S
R
q
Q
P
L
Y
b2
b1
c
L1
DIMENSIONS (mm are the original dimensions)
A
mm
17
°
13
°
6
°
4
°
5.3
4.7
1.9
1.7
2.2
1.8
1.2
0.9
3.2
2.8
0.9
0.6
21
20
16
15
5.45
3.7
3.3
2.6
2.4
5.3
7.5
7.1
0.4
15.7
15.3
16
15
4.0
3.6
3.5
3.3
February 1999
3
Rev 1.000
Philips Semiconductors
Objective specification
TrenchMOS
TM
transistor
PSMN009-100W
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
©
Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
February 1999
4
Rev 1.000
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