Philips Semiconductors Advanced BiCMOS Products

Product specification

MB2543

Dual octal latched transceivers with dual enable
(3-State)

August 23, 1993

8531656 10584

FEATURES

Two 8-bit octal transceivers with D-type
latch

Live insertation/extraction permitted

Power-up 3-State

Power-up reset

Multiple V

and GND pins minimize

switching noise

Back-to-back registers for storage

Separate controls for data flow in each
direction

Output capability: +64mA/32mA

Latch-up protection exceeds 500mA per
Jedec JC40.2 Std 17

ESD protection exceeds 2000V per MIL
STD 883 Method 3015 and 200V per
Machine Model

DESCRIPTION

The MB2543 high-performance BiCMOS
device combines low static and dynamic

power dissipation with high speed and high
output drive.

The MB2543 dual octal registered transceiver
contains two sets of D-type latches for
temporary storage of data flowing in either
direction. Separate Latch Enable (nLEAB,
nLEBA) and Output Enable (nOEAB,
nOEBA) inputs are provided for each
register to permit independent control of data
transfer in either direction. The outputs are
guaranteed to sink 64mA.

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

amb

= 25

C; GND = 0V

TYPICAL

UNIT

PLH

PHL

Propagation delay
nAx to nBx

= 50pF; V

= 5V

3.3

Input capacitance

= 0V or V

I/O

I/O capacitance

= 0V or V

CC;

3-State

CCZ

Total supply current

Outputs disabled; V

= 5.5V

120

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

ORDER CODE

DRAWING NUMBER

52-pin plastic Quad Flat Pack

C to +85

MB2543BB

1418B

PIN CONFIGURATION

LOGIC SYMBOL

Vcc

2A6

2A7

GND

2EAB

2LEAB

2OEAB

2OEBA

2LEBA

2EBA

2B7

2B6

Vcc

1A2

1A3

1A4

GND

1A5

1A6

1A7

2A0

2A1

2A2

2A3

2A4

2A5

41 40

1B2

1B3

1B4

1B5

1B6

1B7

2B0

2B1

2B2

GND

2B3

2B4

2B5

MB2543

52-pin PQFP

1A1

1A0

1EAB

1LEAB

1OEAB

1OEBA

1LEBA

1EBA

GND

1B0

1B1

Vcc

1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7

1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7

1EAB

1EBA

1LEAB

1LEBA

1OEAB

1OEBA

2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7

2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7

2EAB

2EBA

2LEAB

2LEBA

2OEAB

2OEBA

Philips Semiconductors Advanced BiCMOS Products

Product specification

MB2543

Dual octal latched transceivers with dual enable
(3-State)

August 23, 1993

LOGIC DIAGRAM

DETAIL A

nB0

nB1

nA1

nB2

nA2

nB3

nA3

nB4

nA4

nB5

nA5

nB6

nA6

nB7

nA7

DETAIL A X 7

nOEAB

nEAB

nLEAB

nOEBA

nEBA

nLEBA

nA0

LOGIC SYMBOL (IEEE/IEC)

EN1(AB)

EN2(BA)

EN1(AB)

EN2(BA)

Philips Semiconductors Advanced BiCMOS Products

Product specification

MB2543

Dual octal latched transceivers with dual enable
(3-State)

August 23, 1993

FUNCTIONAL DESCRIPTION

The MB2543 contains two sets of eight
D-type latches, with separate control pins for
each set. Using data flow from A to B as an
example, when the A-to-B Enable (nEAB)
input and the A-to-B Latch Enable (nLEAB)
input are Low the A-to-B path is transparent.

A subsequent Low-to-High transition of the
nLEAB signal puts the A data into the latches
where it is stored and the B outputs no longer
change with the A inputs. With EAB and
nOEAB both Low, the 3-State B output

buffers are active and display the data
present at the outputs of the A latches.

Control of data flow from B to A is similar, but
using the nEBA, nLEBA, and nOEBA inputs.

PIN DESCRIPTION

PIN NUMBER

SYMBOL

NAME AND FUNCTION

50, 51, 1, 2, 3, 5, 6, 7,

8, 9, 10, 11, 12, 13, 15, 16

1A0 1A7,

2A0 2A7

Data inputs/outputs

42, 41, 39, 38, 37, 36, 35, 34,

33, 32, 31, 29, 28, 27, 25, 24

1B0 1B7,

2B0 2B7

Data inputs/outputs

47, 46, 20, 21

1OEAB, 1OEBA,

2OEAB, 2OEBA

A to B / B to A Output Enable inputs (active-Low)

49, 44, 18, 23

1EAB, 1EBA,

2EAB, 2EBA

A to B / B to A Enable inputs (active-Low)

48, 45, 19, 22

1LEAB, 1LEBA,

2LEAB, 2LEBA

A to B / B to A Latch Enable inputs (active-Low)

4, 17, 30, 43

GND

Ground (0V)

14, 26, 40, 52

Positive supply voltage

FUNCTION TABLE

INPUTS

OUTPUTS

STATUS

nOEXX

nEXX

nLEXX

nAx or nBx

nBx or nAx

Disabled

L
L

Z
Z

Disabled + Latch

L
L

Latch + Display

L
L

Transparent

Hold

H = High voltage level
h

= High voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA)

= Low voltage level

= Low voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA)

X = Don't care

= Low-to-High transition of nLEXX or nEXX (XX = AB or BA)

NC= No change
Z = High impedance or "off" state

Philips Semiconductors Advanced BiCMOS Products

Product specification

MB2543

Dual octal latched transceivers with dual enable
(3-State)

August 23, 1993

ABSOLUTE MAXIMUM RATINGS

1 , 2

SYMBOL

PARAMETER

CONDITIONS

RATING

UNIT

DC supply voltage

0.5 to +7.0

DC input diode current

< 0

DC input voltage

1.2 to +7.0

DC output diode current

< 0

OUT

DC output voltage

output in Off or High state

0.5 to +5.5

OUT

DC output current

output in Low state

128

stg

Storage temperature range

65 to 150

NOTES:
1 . Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the

device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.

2 . The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction

temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150

3 . The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

SYMBOL

PARAMETER

LIMITS

UNIT

Min

Max

DC supply voltage

4.5

5.5

Input voltage

High-level input voltage

2.0

Low-level Input voltage

0.8

High-level output current

Low-level output current

Input transition rise or fall rate

ns/V

amb

Operating free-air temperature range

+85

Philips Semiconductors Advanced BiCMOS Products

Product specification

MB2543

Dual octal latched transceivers with dual enable
(3-State)

August 23, 1993

DC ELECTRICAL CHARACTERISTICS

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

amb

= +25

amb

= 40

to +85

UNIT

MIN

TYP

MAX

MIN

MAX

Input clamp voltage

= 4.5V; I

= 18mA

0.9

1.2

= 4.5V; I

= 3mA; V

= V

or V

2.5

2.9

2.5

High-level output voltage

= 5.0V; I

= 3mA; V

= V

or V

3.0

3.4

3.0

= 4.5V; I

= 32mA; V

= V

or V

2.0

2.4

2.0

Low-level output voltage

= 4.5V; I

= 64mA; V

= V

or V

0.42

0.55

RST

Power-up output voltage

= 5.5V; I

= 1mA; V

= GND or V

0.13

0.55

Input leakage

Control pins

= 5.5V; V

= GND or 5.5V

0.01

1.0

current

Data pins

= 5.5V; V

= GND or 5.5V

100

OFF

Power-off leakage current

= 0.0V; V

or V

4.5V

5.0

100

PU/PD

Power-up/down 3-State
output current

= 2.1V; V

= 0.5V; V

= GND or V

;

= Don't care

5.0

+ I

OZH

3-State output High current

= 5.5V; V

= 2.7V; V

= V

or V

5.0

+ I

OZL

3-State output Low current

= 5.5V; V

= 0.5V; V

= V

or V

5.0

CEX

Output High leakage current

= 5.5V; V

= GND or V

5.0

Output current

= 5.5V; V

= 2.5V

100

180

CCH

= 5.5V; Outputs High, V

= GND or V

120

250

CCL

Quiescent supply current

= 5.5V; Outputs Low, V

= GND or V

CCZ

= 5.5V; Outputs 3-State;

= GND or V

120

250

Additional supply current per
input pin

= 5.5V; one input at 3.4V,

other inputs at V

or GND

0.5

1.5

NOTES:
1 . Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2 . This is the increase in supply current for each input at 3.4V.
3 . For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4 . This parameter is valid for any V

between 0V and 2.1V, with a transition time of up to 10msec. From V

= 2.1V to V

= 5V

10% a

transition time of up to 100

sec is permitted.

Part Number MB2543