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Part Number MM74C08

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TL F 5878
MM54C08MM74C08
Quad
2-Input
AND
Gate
February 1988
MM54C08 MM74C08 Quad 2-Input AND Gate
General Description
Employing complementary MOS (CMOS) transistors to
achieve wide power supply operating range low power con-
sumption and high noise margin these gates provide basic
functions used in the implementation of digital integrated
circuit systems The N- and P-channel enhancement mode
transistors provide a symmetrical circuit with output swing
essentially equal to the supply voltage No DC power other
than that caused by leakage current is consumed during
static condition All inputs are protected from damage due
to static discharge by diode clamps to V
CC
and GND
Features
Y
Wide supply voltage range
3 0V to 15V
Y
Guaranteed noise margin
1 0V
Y
High noise immunity
0 45 V
CC
(typ )
Y
Low power
Fan out of 2
TTL compatibility
driving 74L
Y
Low power consumption
10 nW package (typ )
Connection Diagram and Truth Table
Dual-In-Line Package
TL F 5878 ­ 1
Top View
Order Number MM54C08 or MM74C08
Inputs
Outputs
A
B
Y
L
L
L
L
H
L
H
L
L
H
H
H
H
e
High Level
L
e
Low Level
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings
(Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Voltage at Any Pin
b
0 3V to V
CC
a
0 3V
Operating Temperature Range
MM54C08
b
55 C to
a
125 C
MM74C08
b
40 C to
a
85 C
Storage Temperature Range
b
65 C to
a
150 C
Power Dissipation (P
D
)
Dual-In-Line
700 mW
Small Outline
500 mW
Operating V
CC
Range
3 0V to 15V
Absolute Maximum V
CC
18V
Lead Temperature
(Soldering 10 seconds)
260 C
DC Electrical Characteristics
Min Max limits apply across the guaranteed temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
V
IN(1)
Logical ``1'' Input Voltage
V
CC
e
5 0V
3 5
V
V
CC
e
10V
8 0
V
V
IN(0)
Logical ``0'' Input Voltage
V
CC
e
5 0V
1 5
V
V
CC
e
10V
2 0
V
V
OUT(1)
Logical ``1'' Output Voltage
V
CC
e
5 0V I
O
e b
10 mA
4 5
V
V
CC
e
10V I
O
e b
10 mA
9 0
V
V
OUT(0)
Logical ``0'' Output Voltage
V
CC
e
5 0V I
O
e
10 mA
0 5
V
V
CC
e
10V I
O
e
10 mA
1 0
V
I
IN(1)
Logical ``1'' Input Current
V
CC
e
15V V
IN
e
15V
0 005
1 0
m
A
I
IN(0)
Logical ``0'' Input Current
V
CC
e
15V V
IN
e
0V
b
1 0
b
0 005
m
A
I
CC
Supply Current
V
CC
e
15V
0 01
15
m
A
CMOS LPTTL INTERFACE
V
IN(1)
Logical ``1'' Input Voltage
54C V
CC
e
4 5V
V
CC
b
1 5
V
74C V
CC
e
4 75V
V
CC
b
1 5
V
V
IN(0)
Logical ``0'' Input Voltage
54C V
CC
e
4 5V
0 8
V
74C V
CC
e
4 75V
0 8
V
V
OUT(1)
Logical ``1'' Output Voltage
54C V
CC
e
4 5V I
O
e b
360 mA
2 4
V
74C V
CC
e
4 75V I
O
e b
360 mA
2 4
V
V
OUT(0)
Logical ``0'' Output Voltage
54C V
CC
e
4 5V I
O
e
360 mA
0 4
V
74C V
CC
e
4 75V I
O
e
360 mA
0 4
V
OUTPUT DRIVE (see 54C 74C Family Characteristics Data Sheet) T
A
e
25 C (short circuit current)
I
SOURCE
Output Source Current
V
CC
e
5 0V V
OUT
e
0V
b
1 75
b
3 3
mA
(P-Channel)
I
SOURCE
Output Source Current
V
CC
e
10V V
OUT
e
0V
b
8 0
15
mA
(P-Channel)
I
SINK
Output Sink Current
V
CC
e
5 0V V
OUT
e
V
CC
1 75
3 6
mA
(N-Channel)
I
SINK
Output Sink Current
V
CC
e
10V V
OUT
e
V
CC
8 0
16
mA
(N-Channel)
Note 1
``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed Except for ``Operating Temperature Range''
they are not meant to imply that the devices should be operated at these limits The table of ``Electrical Characteristics'' provides conditions for actual device
operation
2
AC Electrical Characteristics
(MM54C08 MM74C08) T
A
e
25 C C
L
e
50 pF unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
pd0
t
pd1
Propagation Delay Time to
V
CC
e
5 0V
80
140
ns
Logical ``1'' or ``0''
V
CC
e
10V
40
70
ns
C
IN
Input Capacitance
(Note 2)
5 0
pF
C
PD
Power Dissipation Capacitance
(Note 3) Per Gate
14
pF
AC Parameters are guaranteed by DC correlated testing
Note 2
Capacitance is guaranteed by periodic testing
Note 3
C
PD
determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C Family Characteristics Application
Note
AN-90
Typical Performance Characteristics
Propagation Delay Time vs
Load Capacitance
MM54C08 MM74C08
TL F 5878 ­ 2
AC Test Circuit
TL F 5878 ­ 3
Note
Delays measured with input t
r
t
f
e
20 ns
Switching Time Waveforms
TL F 5878 ­ 4
3
MM54C08MM74C08
Quad
2-Input
AND
Gate
Physical Dimensions
inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C08J or MM74C08J
NS Package Number J14A
Molded Dual-In-Line Package (N)
Order Number MM54C08N or MM74C08N
NS Package Number N14A
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION As used herein
1 Life support devices or systems are devices or
2 A critical component is any component of a life
systems which (a) are intended for surgical implant
support device or system whose failure to perform can
into the body or (b) support or sustain life and whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system or to affect its safety or
with instructions for use provided in the labeling can
effectiveness
be reasonably expected to result in a significant injury
to the user
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