January 2003
1
MIC2551
MIC2551
Micrel
MIC2551
USB Transceiver
Final Information
General Description
The MIC2551 is a single chip transceiver that complies with
the physical layer specifications of the Universal Serial Bus
(USB) 2.0. It supports both full speed (12Mbps) and low
speed (1.5Mbps) operation. It is also designed to operate
down to 1.6V in order to be compatible with lower system
voltages of most mobile systems.
Typical Application
System
Supply Voltage
USB SIE
Controller
VIF
OE#
RCV
VP
VM
D
D+
VBUS
VTRM
GND
D
D+
USB
Port
41206ESDA SurgX
GND
GPIO
MIC2551
SPD
1.0
µ
F (min)
10
µ
F (max)
(See "Applications Information"
for additional suppliers.)
VCC
SUS
VPU
R
S
20
/
±
1%
R
S
20
/
±
1%
V
BUS
1.5k
1
µ
F
CON
Typical Application Circuit
Features
· Compliant to USB Specification Revision 2.0 for full
speed (12Mbs) and low speed (1.5Mbps) operation
· Compliant to IEC-61000-4.2 (Level 3)
· Separate I/O supply with operation down to 1.6V
· Integrated speed select termination supply
· Very-low power consumption to meet USB suspend-
current requirements
· Small TSSOP and MLFTM packages
· No power supply sequencing requirements
· Software controlled re-enumeration
Applications
· PDAs
· Palmtops
· Cell phones
Ordering Information
Part Number
Package
MIC2551BTS
14-Pin TSSOP
MIC2551BML
16-Pin MLFTM
Micrel, Inc. · 1849 Fortune Drive · San Jose, CA 95131 · USA · tel + 1 (408) 944-0800 · fax + 1 (408) 944-0970 · http://www.micrel.com
MicroLeadFrame and MLF are trademarks of Amkor Technology.
SurgX is a registered trademark of Cooper Electronics Technologies.
MIC2551
Micrel
MIC2551
2
January 2003
Pin Description
Pin Number
Pin Number
Pin Name
I/O
Pin Function
MIC2551BTS
MIC2551BML
1
15
VIF
I
System Interface Supply Voltage: Used to provide reference
supply voltage for system I/O interface signaling.
2
1
SPD
I
Edge Rate Control: A logic HIGH operates at edge rates for "full
speed" operation. A logic LOW operates edge rates for "low
speed" operation.
3
2
RCV*
O
Receive Data: Output for USB differential data.
4
3
VP*
I/O
If OE# = 1, VP = Receiver output (+)
If OE# = 0, VP = Driver input (+)
5
4
VM*
I/O
If OE# = 1 VM, = Receiver output (-)
If OE# = 0, VM = Driver input (-)
6
5
CON
I
CONNECT (Input): Controls state of VPU. Refer to VPU pin
description for detail.
7
6
GND
Ground Reference.
8
7
SUS
I
Suspend: Active-High. Turns off internal circuits to reduce supply
current.
9
9
OE#*
I
Output Enable: Active-Low. Enables the transceiver to transmit
data onto the bus. When not active, the transceiver is in the
receive mode.
10/11
10/11
D, D+*
I/O
Differential data lines conforming to the USB standard.
12
12
VTRM
O
3.3V Reference Supply Output: Requires a minimum 0.1
µ
F
decoupling capacitor for stability, 1
µ
F recommended.4
13
13
VPU
O
Pull-up Supply Voltage Output: Used to connect 1.5k
pull-up
speed detect resistor. If CON = 1, VPU is high impedance.
If CON = 0, VPU = 3.3V.
14
14
VBUS
I
USB Bus Supply Voltage: Used to power USB transceiver and
internal circuitry.
8,16
NC
No connect.
* See Table 1 for description of logic states.
Pin Configuration
1
VIF
SPD
RCV
VP
VM
CON
GND
14 VBUS
VPU
VTRM
D+
D-
OE#
SUS
13
12
11
10
9
8
2
3
4
5
6
7
14-Pin TSSOP
1
2
3
4
12
11
10
9
16 15 14 13
5
6
7
8
SPD
RCV
VP
VM
VTRM
D+
D--
OE#
VPU
VBUS
VIF
NC
NC
SUS
GND
CON
16-Pin MLFTM (ML)
January 2003
3
MIC2551
MIC2551
Micrel
SUS
OE#
D+, D
RCV
VP/VM
Function
0
0
Driving
Active
Active
Normal transmit mode
0
1
Receiving
Active
Active
Normal receive mode
1
0
Hi-Z
0
Not active
Low power state
1
1
Hi-Z
0
Active
Receiving during suspend (low power
state) (Note 1)
Note 1. During suspend VP and VM are active in order to detect out of band signaling conditions.
Table 1. Function Selection
OE# = 0:
Input
Output
VP
VM
D+
D-
RCV
Result
0
0
0
0
X
SE0
0
1
0
1
0
Logic 0
1
0
1
0
1
Logic 1
1
1
1
1
X
Undefined
OE# = 1:
Input
Output
D+
D-
VP
VM
RCV
Result
0
0
0
0
X
SE0
0
1
0
1
0
Logic 0
1
0
1
0
1
Logic 1
1
1
1
1
X
Undefined
X - Undefined
Table 2. Truth Table During Normal Mode
MIC2551
Micrel
MIC2551
4
January 2003
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
BUS
) ................................................. 6.5V
All Other Inputs ............................................. 0.5V to 5.5V
Ambient Storage Temperature ................. 65
°
C to +150
°
C
Output Current (D+, D) ..........................................
±
50mA
Output Current (all others) .......................................
±
15mA
Input Current ............................................................
±
50mA
ESD, Note 3
V
BUS
, D+, D ........................................................
±
11KV
All other pins ..........................................................
±
2KV
Operating Ratings
(Note 2)
Ambient Operating Temperature ................ 40
°
C to +85
°
C
Package Thermal Resistance
TSSOP (
JA
) ..................................................... 100
°
C/W
MLF (
JA
) ............................................................ 59
°
C/W
DC Electrical Characteristics (System and USB Interface)
(Note 7)
V
IF
= 3.6V, V
BUS
= 5V unless otherwise noted; T
A
= 25
°
C. Bold indicates specifications over temperature, 40
°
C to 85
°
C.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
BUS
USB Supply Voltage
4.0
5.25
V
V
IF
System I/F Supply Voltage
1.6
3.6
V
V
IL
LOW-Level Input Voltage, Note 4
V
IF
0.3
0.15V
IF
V
V
IH
HIGH-Level Input Voltage, Note 4
0.85V
IF
V
IF
+0.3
V
V
OH
HIGH-Level Output Voltage, Note 4
I
OH
= 20
µ
A
0.9V
IF
V
V
OL
LOW-Level Output Voltage, Note 4
I
OL
= 20
µ
A
0.1
V
I
IL
Input Leakage Current, Note 4
5
5
µ
A
I
IF
VIF Supply Current
D+, D are idle, OE# = SUS = 0
5
µ
A
D+, D are idle, OE# = 0, SUS = 1
5
µ
A
D+, D active, C
LOAD
= 50pF,
450
650
µ
A
SPD = 1, f = 6MHz, Note 5
D+, D active, C
LOAD
= 600pF
50
75
µ
A
SPD = 0, f = 750kHz, Note 5
I
BUS
VBUS Supply Current
V
BUS
= 5.25V, D+, D are idle
65
100
µ
A
Suspend Mode (SUS = 1)
V
BUS
= 5.25V, D+, D are idle, SPD = 1
3.3
5
mA
SUS = OE# = 0
V
BUS
= 5.25V, D+, D are idle
500
700
µ
A
SUS = OE# = SPD = 0
V
BUS
= 5.25V, D+, D are idle, OE# = 1
250
350
µ
A
SUS = SPD = 0
V
BUS
= 5.25V, D+, D active,
7.3
10
mA
C
LOAD
= 50pF, SPD = 1
SUS = OE# = 0, f = 6MHz, Note 5
V
BUS
= 5.25V, D+, D active, C
LOAD
= 600pF
3.6
5
mA
SPD = SUS = OE# = 0, f = 750kHz, Note 5
I
VPULEAK
VPU Leakage Current
CON = 1, V
PU
= 0V
5
5
µ
A
I
VIFLEAK
VIF Leakage Current
V
IF
= 3.6V, V
BUS
= 0V
5
5
µ
A
V
PU
Pull-Up Output Voltage
I
TERM
= 200
µ
A, V
BUS
= 4.0 to 5.25V
3.0
3.3
3.6
V
R
SW
Internal Pull-Up Termination
I
TERM
= 10mA, V
BUS
= 4.0 to 5.25V
10
ESD Protection
IEC-1000-4-2
Air Discharge
10 pulses
±
8
kV
(D+, D,
Contact Discharge
10 pulses
±
9
kV
V
BUS
only)
January 2003
5
MIC2551
MIC2551
Micrel
DC Electrical Characteristics (Transceiver)
(Note 7)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Leakage Current
I
LO
Hi-Z State Data Line Leakage
0V < V
IN
< 3.3V, SUS = 1
10
10
µ
A
(Suspend Mode)
Input Levels
V
DI
Differential Input Sensitivity
|(D+) (D)|
0.2
V
V
CM
Differential Common Mode Range
Includes V
DI
range
0.8
2.5
V
V
SE
Single Ended Receiver Threshold
0.8
2.0
V
Receiver Hysteresis
200
mV
Output Levels
V
OL
Static Output Low
R
L
= 1.5k
to 3.6V
0.3
V
V
OH
Static Output High
R
L
= 15k
to GND
2.8
3.6
V
Capacitance
C
IN
Transceiver Capacitance
Pin to GND
10
pF
Z
DRV
Driver Output Resistance
Steady state drive
8
16
24
AC Electrical Characteristics
(Notes 6, 7)
Driver Characteristics (Low Speed)
T
R
Transition Rise Time
C
L
= 50pF, Figure 2
75
ns
C
L
= 600pF
300
T
F
Transition Fall Time
C
L
= 50pF, Figure 2
75
ns
C
L
= 600pF
300
T
R
, T
F
Rise/Fall Time Matching
(T
R
, T
F
)
80
125
%
V
CRS
Output Signal Crossover Voltage
1.3
2.0
V
Driver Characteristics (Full Speed)
T
R
Transition Rise Time
C
L
= 50pF, Figure 2
4
20
ns
T
F
Transition Fall Time
C
L
= 50pF, Figure 2
4
20
ns
T
R
, T
F
Rise/Fall Time Matching
(T
R
, T
F
)
90
111.11
%
V
CRS
Output Signal Crossover Voltage
1.3
2.0
V
Transceiver Timing
t
PVZ
OE# to RCVR Tri-State Delay
Figure 1
15
ns
t
PZD
Receiver Tri-State to Transmit Delay
Figure 1
15
ns
t
PDZ
OE# to DRVR Tri-State Delay
Figure 1
15
ns
t
PZV
Driver Tri-State to Receive Delay
Figure 1
15
ns
t
PLH
VP, VM to D+, D Propagation Delay
Figure 4
15
ns
t
PHL
t
PLH
D+, D to RCV Propagation Delay
Figure 3
15
ns
t
PHL
t
PLH
D+, D to V
P
, V
M
Propagation Delay
Figure 3
8
ns
t
PHL
Note 1.
Exceeding the absolute maximum rating may damage the device.
Note 2.
The device is not guaranteed to function outside its operating rating.
Note 3.
Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
Note 4.
Specification applies to the following pins: SUS, SPD, RCV, CON, RCV, VP, VM, OE#.
Note 5.
Characterized specification(s), but not production tested.
Note 6.
All AC parameters guaranteed by design but not production tested.
Note 7.
Specification for packaged product only.
MIC2551
Micrel
MIC2551
6
January 2003
Timing Diagrams
t
PVZ
OE#
V
P
/V
M
D+/D
TRANSMIT
RECEIVE
t
PZD
t
PDZ
t
PZV
Figure 1. Enable and Disable Times
t
R
Rise Time
Fall Time
Differential
Data Lines
10%
90%
10%
90%
t
F
Figure 2. Rise and Fall Times
t
PLH
V
CRS
V
SS
V
OL
V
OH
D
D+
V
CRS
Differential
Data Lines
t
PHL
Figure 3. Receiver Propagation Delay
t
PLH
V
CRS
V
OL
V
OH
D
D+
V
CRS
Differential
Data Lines
t
PHL
Figure 4. Driver Propagation Delay
Test Circuits
D.U.T.
25pF
Figure 5. Load for V
P
, V
M
, RCV
D.U.T.
C
L
15k
20
VTRM
15k
Figure 6. Load for D+, D
January 2003
7
MIC2551
MIC2551
Micrel
Functional Description
The MIC2551 is designed to provide USB connectivity in
mobile systems where available system supply voltages are
not able to satisfy USB requirements. The MIC2551 can
operate down to supply voltages of 1.6V and still meet USB
physical layer specifications. As shown in the circuit above,
the MIC2551 takes advantage of the USB supply voltage,
V
BUS
, to operate the transceiver. The system voltage, V
IF
, is
used to set the reference voltage used by the digital I/O lines
interfacing to the system controller. Internal circuitry provides
translation between the USB and system voltage domains.
V
IF
will typically be the main supply voltage rail for the
controller.
Functional Diagram
To Internal
Circuitry
VBUS
VTERM
VPU
D+
D
Le
v
e
l
T
r
anslator
LDO
Regulator
VIF
CON
SPD
OE#
RCV
VP
VM
SUS
GND
MIC2551 Block Diagram
In addition, a 3.3V, 10% termination supply voltage, V
PU
, is
provided to support speed selection. V
PU
can be disabled or
enabled under software control via the CON input. This
allows for software-controlled connect or disconnect states.
A 1.5k resistor is required to be connected between this pin
and the D+ or D lines to respectively specify high speed or
low speed operation.
The use of ESD transient protection devices is not required
for operation, but is recommended. The MIC2551 is ESD
rated for 11kV at the VBUS and D+, D pins and 2kV for all
other pins.
MIC2551
Micrel
MIC2551
8
January 2003
Application Information
Power Supply Configuration
The MIC2551 can be set up for different power supply
configurations which modify the behavior of the device. Both
V
BUS
and V
IF
have special thresholds that detect when they
are either removed or grounded. Table 3 depicts the behavior
under the different power supply configuration scenarios that
are explained below.
Normal Mode
V
BUS
is connected to the 5.0V USB bus voltage and V
IF
is
connected to a supply voltage in the range of 1.6V to 3.6V. In
this case V
TRM
supplies a 3.3V voltage for powering the
speed select resistor via V
PU
depending on the state of the
CON pin.
Disconnect Mode
V
IF
is connected to a supply in a range of 1.6V to 3.6V and
V
BUS
is open or grounded. If V
BUS
is opened while transmit-
ting, the data lines (D+, D) have sharing capability and may
be driven with external devices up to approximately 3.6V if,
and only if, SUSPEND is enabled (SUS = 1). With V
BUS
ground, D+, D sharing mode is not permitted.
Disable Mode
V
BUS
is connected to the 5.0V USB bus voltage and V
IF
is
open. All logic controlled inputs become high impedances,
thus minimal current will be supplied by V
IF
if the input pins are
pulled up to an external source.
Alternate Power Supply Configuration Options
I/O Interface Using 3.3V
In systems where the I/O interface utilizes a 3.3V USB
controller, an alternate solution is shown in Figure 7. No extra
components are required; however, the load on V
TRM
must
not exceed 10mA.
MIC2551
VIF
VBUS
I/O
VBUS
V
P
/V
M
/
RCV/OE#
VTRM
USB
Controller
V
DD
3.3V
Figure 7. I/O Interface Uses 3.3V
Bypass Input
V
BUS
and V
TRM
are tied together to a supply voltage in the
range of 3.0V to 3.6V. The internal regulator is bypassed and
the internal circuitry is run from the V
TRM
input. See Figure 8.
MIC2551
VIF
3.3V
VBUS
VTRM
Figure 8. Powering Chip
from Internal 3.3V Source
Signal Amplitude Respective to V
IF
When operating the MIC2551, it is necessary to provide input
signals which do not exceed V
IF
+ 0.3V.
External ESD Protection
The use of ESD transient protection devices is not required
for operation, but is recommended. We recommend the
following devices or the equivalent:
Cooper Electronic Technologies (
www.cooperet.com)
41206ESDA SurgX
0805ESDA SurgX
Littelfuse (
www.littelfuse.com)
V0402MHS05
SP0503BAHT
Non-Multiplexed Bus
In order to save pin count for the USB logic controller
interface, the MIC2551 was designed with V
P
and V
M
as bi-
directional pins. To interface the MIC2551 with a non-multi-
plexed data bus, resistors can be used for low cost isolation
as shown in Figure 9.
V
PO
V
P
V
M
V
MO
USB Logic
Controller
(SIE)
MIC2551
V
P
V
M
10k
10k
Figure 9. MIC2551 Interface to
Non-Multiplexed Data Bus
Configuration Mode
VBUS/VTRM
VIF
Notes
Normal
Connected
Connected
Normal supply configuration and operation.
Disconnect
Open
Connected
VP/VM are HIGH outputs, RCV is LOW.
(D+/D sharing)
With OE# = 0 and SUS = 1, data lines may be driven with
external devices up to 3.6V.
With D+, D floating, I
IF
draws less than 1
µ
A.
Disconnect
Ground
Connected
VP/VM are HIGH outputs, RCV is LOW.
With D+, D floating, I
IF
draws less than 1
µ
A.
Disable Mode
Connected
Open
Logic controlled inputs pins are Hi-Z.
Prohibited
Connected
Ground
Prohibited condition.
Table 3. Power Supply Configuration
January 2003
9
MIC2551
MIC2551
Micrel
PCB Layout Recommendations
Although the USB standard and applications are not based in
an impedance controlled environment, a properly designed
PCB layout is recommended for optimal transceiver perfor-
mance. The suggested PCB layout hints are as follows:
· Match signal line traces (VP/VM, D+, D) to
40ps, approximately
1
/
3
inch if possible. FR-4
PCB material propagation is about 150ps/inch,
so to minimize skew try to keep VP/VM, D+/D
traces as short as possible.
· For every signal line trace width (w), separate
the signal lines by 1.52 widths. Place all other
traces at >2 widths from all signal line traces.
· Maintain the same number of vias on each
differential trace, keeping traces approximately
at same separation distance along the line.
· Control signal line impedances to
±
10%.
· Keep R
S
as close to the IC as possible, with
equal distance between R
S
and the IC for both
D+ and D.
MIC2551
Micrel
MIC2551
10
January 2003
Package Information
1.10 MAX (0.043)
0.15 (0.006)
0.05 (0.002)
1.00 (0.039) REF
0.65 BSC
(0.026)
8
°
0
°
6.4 BSC (0.252)
5.10 (0.200)
4.90 (0.193)
0.20 (0.008)
0.09 (0.003)
0.70 (0.028)
0.50 (0.020)
DIMENSIONS:
MM (INCH)
4.50 (0.177)
4.30 (0.169)
0.30 (0.012)
0.19 (0.007)
14-lead TSSOP (TS)
3.00BSC
2.75BSC
0.50 DIA
3.00BSC
12
°
max
SEATING
PLANE
2.75BSC
16
1
1
2
3
4
N
2
3
4
0.85
+0.15
0.65
0.65
+0.15
0.65
0.01
+0.04
0.01
0.23
+0.07
0.05
0.01
+0.04
0.01
0.42
+0.18
0.18
0.42
+0.18
0.18
0.23
+0.07
0.05
1.60
+0.10
0.10
PIN 1 ID
0.5 BSC
1.5 REF
0.42
+0.18
0.18
1.60
+0.10
0.10
0.40
+0.05
0.05
0.20 REF.
0.5BSC
SECTION "C-C"
SCALE: NONE
FOR EVEN TERMINAL/SIDE
TOP VIEW
BOTTOM VIEW
1. DIMENSIONS ARE IN mm.
2. DIE THICKNESS ALLOWABLE IS 0.305mm MAX.
3. PACKAGE WARPAGE MAX 0.05mm.
4. THIS DIMENSION APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.20mm AND 0.25mm FROM TIP.
5. APPLIES ONLY FOR TERMINALS
C C
CL
4
Rev. 02
16-Pin MLFTM (ML)
MICREL, INC.
1849 FORTUNE DRIVE
SAN JOSE, CA 95131
USA
TEL
+ 1 (408) 944-0800
FAX
+ 1 (408) 944-0970
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel, Inc.
© 2003 Micrel, Incorporated
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