Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A
04/30/03

IS62WV5128ALL
IS62WV5128BLL

ISSI

Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.

512K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM

FEATURES

· High-speed access time: 55ns, 70ns

· CMOS low power operation

36 mW (typical) operating

9 µW (typical) CMOS standby

· TTL compatible interface levels

· Single power supply

1.65V 2.2V V

(IS62WV5128ALL)

2.5V 3.6V V

(IS62WV5128BLL)

· Fully static operation: no clock or refresh

required

· Three state outputs

· Industrial temperature available

DESCRIPTION

The

ISSI

IS62WV5128ALL / IS62WV5128BLL are high-

speed, 4M bit static RAMs organized as 512K words by 8
bits. It is fabricated using

ISSI

's high-performance CMOS

technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.

When

CS1

is HIGH (deselected) the device assumes a

standby mode at which the power dissipation can be
reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable

(WE)

controls both writing and reading of the memory.

The IS62WV5128ALL and IS62WV5128BLL are packaged
in the JEDEC standard 32-pin TSOP (TYPE I), 32-pin
sTSOP (TYPE I), and 32-pin TSOP (Type II).

FUNCTIONAL BLOCK DIAGRAM

APRIL 2003

A0-A18

CS1

512K x 8

MEMORY ARRAY

DECODER

COLUMN I/O

CONTROL

CIRCUIT

GND

I/O

DATA

CIRCUIT

I/O0-I/O7

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A

04/30/03

IS62WV5128ALL, IS62WV5128BLL

ISSI

32-pin TSOP (TYPE I), (Package Code T)
32-pin sTSOP (TYPE I) (Package Code H)

32-pin TSOP (TYPE II)
(Package Code T2)

PIN DESCRIPTIONS

A0-A18

Address Inputs

CS1

Chip Enable 1 Input

Output Enable Input

Write Enable Input

I/O0-I/O7

Input/Output

No Connection

Power

GND

Ground

PIN CONFIGURATION

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

A11

A9
A8

A13

A18
A15
V

A17
A16
A14
A12

A7
A6
A5
A4

A10

CS1

I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

A17
A16
A14
A12

A7
A6
A5
A4
A3
A2
A1
A0

I/O0
I/O1
I/O2

GND

A15
A18

A13
A8
A9
A11

A10

CS1

I/O7
I/O6
I/O5
I/O4
I/O3

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A
04/30/03

IS62WV5128ALL, IS62WV5128BLL

ISSI

DC ELECTRICAL CHARACTERISTICS

(Over Operating Range)

Symbol

Parameter

Test Conditions

Min.

Max.

Unit

Output HIGH Voltage

= -0.1 mA

1.65-2.2V

1.4

= -1 mA

2.5-3.6V

2.2

Output LOW Voltage

= 0.1 mA

1.65-2.2V

0.2

= 2.1 mA

2.5-3.6V

0.4

Input HIGH Voltage

1.65-2.2V

1.4

+ 0.2

2.5-3.6V

2.2

+ 0.3

(1)

Input LOW Voltage

1.65-2.2V

0.2

0.4

2.5-3.6V

0.2

0.6

Input Leakage

GND

µA

Output Leakage

GND

OUT

, Outputs Disabled

µA

Notes:
1. V

(min.) = 1.0V for pulse width less than 10 ns.

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol

Parameter

Value

Unit

TERM

Terminal Voltage with Respect to GND

0.2 to V

+0.3

Related to GND

0.2 to V

+0.3

STG

Storage Temperature

65 to +150

°C

Power Dissipation

1.0

Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is

a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect reliability.

OPERATING RANGE (V

)

Range

Ambient Temperature

IS62WV5128ALL

IS62WV5128BLL

Commercial

0°C to +70°C

1.65V - 2.2V

2.5V - 3.6V

Industrial

40°C to +85°C

1.65V - 2.2V

2.5V - 3.6V

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A

04/30/03

IS62WV5128ALL, IS62WV5128BLL

ISSI

AC TEST LOADS

Figure 1

Figure 2

CAPACITANCE

(1)

Symbol

Parameter

Conditions

Max.

Unit

Input Capacitance

= 0V

OUT

Input/Output Capacitance

OUT

= 0V

Note:
1. Tested initially and after any design or process changes that may affect these parameters.

AC TEST CONDITIONS

Parameter

IS62WV5128ALL

IS62WV5128BLL

(Unit)

Input Pulse Level

0.4V to V

-0.2V

0.4V to V

-0.3V

Input Rise and Fall Times

5 ns

5ns

Input and Output Timing

REF

and Reference Level

Output Load

See Figures 1 and 2

IS62WV5128ALL

IS62WV5128BLL

1.65 - 2.2V

2.5V - 3.6V

R1(

)

3070

R2(

)

3150

REF

0.9V

1.5V

1.8V

2.8V

30 pF

Including

jig and

scope

OUTPUT

VTM

5 pF

Including

jig and

scope

OUTPUT

VTM

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A
04/30/03

IS62WV5128ALL, IS62WV5128BLL

ISSI

POWER SUPPLY CHARACTERISTICS

(1)

(Over Operating Range)

62WV5128ALL

(1.65V - 2.2V)

Symbol Parameter

Test Conditions

Max.

Unit

70 ns

Dynamic Operating

= Max.,

Com.

Supply Current

OUT

= 0 mA, f = f

MAX

Ind.

Operating Supply

= Max.,

CS1

= 0.2V Com.

Current

= V

-0.2V

Ind.

f=1

MHZ

TTL Standby Current

= Max.,

Com.

0.35

(TTL Inputs)

= V

or V

Ind.

0.35

CS1

= V

f = 1 MH

CMOS Standby

= Max.,

Com.

µA

Current (CMOS Inputs)

CS1

0.2V,

Ind.

0.2V, or

0.2V, f = 0

Note:
1. At f = f

MAX

, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

POWER SUPPLY CHARACTERISTICS

(1)

(Over Operating Range)

62WV5128BLL

(2.5V - 3.6V)

Symbol Parameter

Test Conditions

Max.

Unit

55 ns

70 ns

Dynamic Operating

= Max.,

Com.

Supply Current

OUT

= 0 mA, f = f

MAX

Ind.

Operating Supply

= Max.,

CS1

= 0.2V Com.

Current

= V

-0.2V

Ind.

f=1

MHZ

TTL Standby Current

= Max.,

Com.

0.35

(TTL Inputs)

= V

or V

Ind.

0.35

CS1

= V

f = 1 MH

CMOS Standby

= Max.,

Com.

µA

Current (CMOS Inputs)

CS1

0.2V,

Ind.

0.2V, or

0.2V, f = 0

Note:
1. At f = f

MAX

, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A

04/30/03

IS62WV5128ALL, IS62WV5128BLL

ISSI

AC WAVEFORMS

READ CYCLE NO. 1

(1,2)

(Address Controlled) (

CS1

= V

)

DATA VALID

PREVIOUS DATA VALID

OHA

OUT

ADDRESS

READ CYCLE SWITCHING CHARACTERISTICS

(1)

(Over Operating Range)

55 ns

70 ns

Symbol

Parameter

Min.

Max.

Min.

Max.

Unit

Read Cycle Time

Address Access Time

OHA

Output Hold Time

ACS1

CS1

Access Time

DOE

Access Time

HZOE

(2)

to High-Z Output

LZOE

(2)

to Low-Z Output

HZCS1

CS1

to High-Z Output

LZCS1

CS1

to Low-Z Output

Notes:

1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to

-0.2V/V

-0.3V and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A
04/30/03

IS62WV5128ALL, IS62WV5128BLL

ISSI

AC WAVEFORMS

READ CYCLE NO. 2

(1,3)

(

CS1

Controlled)

Notes:
1.

is HIGH for a Read Cycle.

2. The device is continuously selected.

CS1

= V

3. Address is valid prior to or coincident with

CS1

LOW transition.

OHA

DOE

LZOE

ACS1

LZCS1

HZOE

HIGH-Z

DATA VALID

HZCS

ADDRESS

CS1

DOUT

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A

04/30/03

IS62WV5128ALL, IS62WV5128BLL

ISSI

WRITE CYCLE SWITCHING CHARACTERISTICS

(1,2)

(Over Operating Range)

55 ns

70 ns

Symbol

Parameter

Min.

Max.

Min.

Max.

Unit

Write Cycle Time

SCS1

CS1

to Write End

Address Setup Time to Write End

Address Hold from Write End

Address Setup Time

PWE

Pulse Width

Data Setup to Write End

Data Hold from Write End

HZWE

(3)

LOW to High-Z Output

LZWE

(3)

HIGH to Low-Z Output

Notes:

1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4V to

-0.2V/V

-0.3V and output loading specified in Figure 1.

2. The internal write time is defined by the overlap of

CS1

LOW and

LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to

terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write.

3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

AC WAVEFORMS

WRITE CYCLE NO. 1 (

CS1

Controlled,

= HIGH or LOW)

DATA-IN VALID

DATA UNDEFINED

SCS1

PWE

HZWE

HIGH-Z

LZWE

ADDRESS

CS1

DOUT

DIN

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A
04/30/03

IS62WV5128ALL, IS62WV5128BLL

ISSI

WRITE CYCLE NO. 2

(

Controlled:

is HIGH During Write Cycle)

WRITE CYCLE NO. 3

(

Controlled:

is LOW During Write Cycle)

DATA-IN VALID

DATA UNDEFINED

SCS1

PWE

HZWE

HIGH-Z

LZWE

ADDRESS

CS1

DOUT

DIN

DATA-IN VALID

DATA UNDEFINED

SCS1

PWE

HZWE

HIGH-Z

LZWE

ADDRESS

CS1

DOUT

DIN

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A

04/30/03

IS62WV5128ALL, IS62WV5128BLL

ISSI

DATA RETENTION SWITCHING CHARACTERISTICS

Symbol

Parameter

Test Condition

Min.

Max.

Unit

for Data Retention

See Data Retention Waveform

1.2

3.6

Data Retention Current

= 1.2V,

CS1

0.2V

µA

SDR

Data Retention Setup Time

See Data Retention Waveform

RDR

Recovery Time

See Data Retention Waveform

DATA RETENTION WAVEFORM (

CS1

Controlled)

CS1

0.2V

SDR

RDR

CS1

GND

Data Retention Mode

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. A
04/30/03

IS62WV5128ALL, IS62WV5128BLL

ISSI

ORDERING INFORMATION

IS62WV5128ALL (1.65V - 2.2V)

Commercial Range: 0°C to +70°C

Speed (ns)

Order Part No.

Package

IS62WV5128ALL-70T

TSOP, TYPE I

IS62WV5128ALL-70T2

TSOP, TYPE II

IS62WV5128ALL-70H

sTSOP, TYPE I

Industrial Range: 40°C to +85°C

Speed (ns)

Order Part No.

Package

IS62WV5128ALL-70TI

TSOP, TYPE I

IS62WV5128ALL-70T2I

TSOP, TYPE II

IS62WV5128ALL-70HI

sTSOP, TYPE I

ORDERING INFORMATION

IS62WV5128BLL (2.5V - 3.6V)

Commercial Range: 0°C to +70°C

Speed (ns)

Order Part No.

Package

IS62WV5128BLL-55T2

TSOP, TYPE II

IS62WV5128BLL-55H

sTSOP, TYPE I

IS62WV5128BLL-70T

TSOP, TYPE I

IS62WV5128BLL-70T2

TSOP, TYPE II

IS62WV5128BLL-70H

sTSOP, TYPE I

Industrial Range: 40°C to +85°C

Speed (ns)

Order Part No.

Package

IS62WV5128BLL-55TI

TSOP, TYPE I

IS62WV5128BLL-55T2I

TSOP, TYPE II

IS62WV5128BLL-55HI

sTSOP, TYPE I

IS62WV5128BLL-70TI

TSOP, TYPE I

IS62WV5128BLL-70HI

sTSOP, TYPE I

Integrated Silicon Solution, Inc.

PACKAGING INFORMATION

ISSI

Plastic STSOP - 32 pins
Package Code: H (Type I)

Notes:
1. Controlling dimension: millimeters, unless otherwise

specified.

2. BSC = Basic lead spacing between centers.
3. Dimensions D1 and E do not include mold flash protru-

sions and should be measured from the bottom of the package.

4. Formed leads shall be planar with respect to one another

within 0.004 inches at the seating plane.

Plastic STSOP (H - Type I)

Millimeters

Inches

Symbol Min

Max

Min

Max

Ref. Std.

1.25

0.049

0.05

0.002

0.95

1.05

0.037

0.041

0.17

0.23

0.007

0.009

0.14

0.16

0.0055

0.0063

13.20 13.60

0.520

0.535

11.70 11.90

0.461

0.469

7.90

8.10

0.311

0.319

e 0.50 BSC 0.020 BSC
L

0.30

0.70

0.012

0.028

S 0.28 Typ. 0.011 Typ.

0°

5°

0°

5°

PK13197H32 Rev. B 04/21/03

SEATING PLANE

PACKAGING INFORMATION

ISSI

Integrated Silicon Solution, Inc. -- www.issi.com --

1-800-379-4774

Rev. E
02/20/03

Plastic TSOP
Package Code: T (Type II)

SEATING PLANE

N/2

N/2+1

Notes:
1. Controlling dimension: millimieters,

unless otherwise specified.

2. BSC = Basic lead spacing

between centers.

3. Dimensions D and E1 do not

include mold flash protrusions and
should be measured from the
bottom of the package.

4. Formed leads shall be planar with

respect to one another within
0.004 inches at the seating plane.

Plastic TSOP (T - Type II)

Millimeters

Inches

Millimeters

Inches

Millimeters

Inches

Symbol

Min

Max

Min

Max

Min

Max

Min

Max

Min

Max

Min

Max

Ref. Std.

No. Leads (N)

1.20

0.047

1.20

0.047

1.20

0.047

0.05

0.15

0.002

0.006

0.05

0.15

0.002 0.006

0.05

0.15

0.002 0.006

0.30

0.52

0.012

0.020

0.30

0.45

0.012 0.018

0.30

0.45

0.012 0.018

0.12

0.21

0.005

0.008

0.12

0.21

0.005 0.008

0.12

0.21

0.005 0.008

20.82 21.08

0.820

0.830

18.31

18.52

0.721 0.729

20.82 21.08

0.820 0.830

10.03 10.29

0.391

0.400

10.03

10.29

0.395 0.405

10.03 10.29

0.395 0.405

11.56 11.96

0.451

0.466

11.56

11.96

0.455 0.471

11.56 11.96

0.455 0.471

1.27 BSC

0.050 BSC

0.80 BSC

0.032 BSC

0.80 BSC

0.031 BSC

0.40

0.60

0.016

0.024

0.41

0.60

0.016 0.024

0.40

0.60

0.016 0.024

0.95 REF.

0.037 REF.

0.81 REF.

0.032 REF.

0.88 REF.

0.035 REF

0°

5°

0°

5°

0°

5°

0°

5°

0°

5°

0°

5°

Integrated Silicon Solution, Inc.

ISSI

PACKAGING INFORMATION

Plastic TSOP - 32 pins
Package Code: T (Type I)

SEATING PLANE

Notes:
1. Controlling dimension: millimeters, unless otherwise

specified.

2. BSC = Basic lead spacing between centers.
3. Dimensions D and E do not include mold flash

protrusions and

should be measured from the bottom of

the package

4. Formed leads shall be planar with respect to one

another within 0.004 inches at the seating plane.

Plastic TSOP (T--Type I)

Millimeters

Inches

Symbol

Min

Max

Min

Max

Ref. Std.

No. Leads

1.20

0.047

0.05

0.25

0.002

0.010

0.17

0.23

0.007

0.009

0.12

0.17

0.006

0.014

7.90

8.10

0.308

0.316

18.30

18.50

0.714

0.722

19.80

20.20

0.772

0.788

0.50 BSC

0.020 BSC

0.40

0.60

0.016

0.024

PK13197T32 Rev. B 01/31/97

Part Number IS62WV5128BLL