IRS2308(S) PbF revA LAST CHANCE

COM

HIN

LIN

HIN

up to 600 V

LOAD

Typical Connection

HALF-BRIDGE DRIVER

Features

Floating channel designed for bootstrap operation

Fully operational to +600 V

Tolerant to negative transient voltage, dV/dt
immune

Gate drive supply range from 10 V to 20 V

Undervoltage lockout for both channels

3.3 V, 5 V, and 15 V input logic compatible

Cross-conduction prevention logic

Matched propagation delay for both channels

Outputs in phase with inputs

Logic and power ground +/- 5 V offset.

Internal 540 ns deadtime

Lower di/dt gate driver for better noise
immunity

Data Sheet No.PD60266 revA

IRS2308

(S)PbF

www.irf.com

(Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.

Description

The IRS2308/IRS23084 are high voltage, high
speed power MOSFET and IGBT drivers with de-
pendent high and low side referenced output
channels. Proprietary HVIC and latch immune
CMOS technologies enable ruggedized monolithic
construction. The logic input is compatible with
standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer
stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high side configuration which operates up to 600 V.

Packages

8-Lead SOIC

IRS2308S

8-Lead PDIP

IRS2308

PRELIMINARY

Part

Input

logic

Cross-

conduction

prevention

logic

Dead-Time

Ground Pins

2106

COM

21064

HIN/LIN

none

VSS/COM

2108

Internal 540ns

COM

21084

HIN/LIN

yes

Programmable 0.54~5

VSS/COM

2109

Internal 540ns

COM

21094

IN/SD

yes

Programmable 0.54~5

VSS/COM

2304

HIN/LIN

yes

Internal 100ns

COM

2308

yes

HIN/LIN

Internal 540ns

COM

Feature Comparison

IRS2308(S)PbF

PRELIMINARY

www.irf.com

Symbol

Definition

Min.

Max.

Units

High side floating absolute voltage

-0.3

625

High side floating supply offset voltage

- 25

+ 0.3

High side floating output voltage

- 0.3

+ 0.3

Low side and logic fixed supply voltage

-0.3

Low side output voltage

-0.3

+ 0.3

Logic input voltage (HIN & LIN )

- 0.3

+ 0.3

/dt

Allowable offset supply voltage transient

V/ns

Package power dissipation @ T

+25

°C

(8 lead PDIP)

1.0

(8 lead SOIC)

0.625

Rth

Thermal resistance, junction to ambient

(8 lead PDIP)

125

(8 lead SOIC)

200

Junction temperature

150

Storage temperature

-50

150

Lead temperature (soldering, 10 seconds)

300

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.

Note 1: Logic operational for V

of -5 V to +600 V. Logic state held for V

of -5V to -V

. (Please refer to the Design Tip

DT97-3 for more details).

°C

°C/W

Recommended Operating Conditions

The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V

and V

offset rating are tested with all supplies biased at a 15 V differential.

High side floating supply absolute voltage

+ 10

+ 20

High side floating supply offset voltage

Note 1

600

High side floating output voltage

Low side and logic fixed supply voltage

Low side output voltage

Logic input voltage

COM V

Ambient temperature

-40

125

Symbol

Definition

Min.

Max.

Units

°C

www.irf.com

IRS2308(S)PbF

PRELIMINARY

Static Electrical Characteristics

BIAS

, V

) = 15 V, V

= COM, DT= V

and T

= 25

°C unless otherwise specified. The V

, V

IH,

and I

param-

eters are referenced to V

/COM and are applicable to the respective input leads: HIN and LIN. The V

, I

and Ron

parameters are referenced to COM and are applicable to the respective output leads: HO and LO.

Symbol

Definition

Min. Typ. Max. Units Test Conditions

Logic "1" input voltage for HIN & LIN

2.5

Logic "0" input voltage for HIN & LIN

0.8

High level output voltage, V

BIAS

- V

0.05

0.2

Low level output voltage, V

0.02

0.1

Offset supply leakage current

= V

= 600 V

QBS

Quiescent V

supply current

150

QCC

Quiescent V

supply current

0.4

1.0

1.6

IN+

Logic "1" input bias current

HIN = 5 V, LIN = 5 V

IN-

Logic "0" input bias current

HIN = 0 V, LIN = 0 V

CCUV+

and V

supply undervoltage positive going

8.0 8.9 10

BSUV+

threshold

CCUV-

and V

supply undervoltage negative going

7.4

8.2

9.0

BSUV-

threshold

CCUVH

Hysteresis

0.3

0.7

BSUVH

O+

Output high short circuit pulsed current

290

= 0 V,

µs

O-

Output low short circuit pulsed current

250

600

= 15 V,

µs

µA

Dynamic Electrical Characteristics

BIAS

, V

) = 15 V, V

= COM, C

= 1000 pF, T

= 25

°C, DT = V

unless otherwise specified.

Symbol

Definition

Min. Typ.

Max. Units Test Conditions

ton

Turn-on propagation delay

220

300

VS = 0 V

toff

Turn-off propagation delay

200

280

= 0 V or 600 V

Delay matching

ton - toff

Turn-on rise time

100

220

Turn-off fall time

Deadtime: LO turn-off to HO turn-on(DT

LO-HO) &

400

540

680

HO turn-off to LO turn-on (DT

HO-LO)

MDT

Deadtime matching =

LO-HO

- DT

HO-LO

= 0 V

= 10 V to 20 V

= 2 mA

= 0 V or 5 V

www.irf.com

IRS2308(S)PbF

PRELIMINARY

Lead Definitions

Symbol Description

HIN

Logic input for high side gate driver output (HO), in phase

LIN

Logic input for low side gate driver output (LO), in phase

High side floating supply

High side gate driver output

High side floating supply return

Low side and logic fixed supply

Low side gate driver output

COM

Low side return

Lead Assignments

8 Lead PDIP

8 Lead SOIC

IRS2308PbF

IRS2308SPbF

VCC

HIN

LIN

COM

VCC

HIN

LIN

COM

Part Number IRS2308