IRS2109-IRS21094(S) PbF revA
Typical Connection
HALF-BRIDGE DRIVER
Features
·
Floating channel designed for bootstrap operation
·
Fully operational to +600 V
·
Tolerant to negative transient voltage, dV/dt
immune
·
Gate drive supply range from 10 V to 20 V
·
Undervoltage lockout for both channels
·
3.3 V, 5 V and 15 V input logic compatible
·
Cross-conduction prevention logic
·
Matched propagation delay for both channels
·
High side output in phase with IN input
·
Logic and power ground +/- 5 V offset.
·
Internal 540 ns dead-time, and programmable
up to 5
µ
s with one external R
DT
resistor (IRS21094)
·
Lower di/dt gate driver for better noise immunity
·
Shut down input turns off both channels.
IRS21094
IRS2109
IRS2109/IRS21094(S)PbF
Data Sheet No. PD60261 revA
V
OFFSET
600 V max.
I
O
+/-
120 mA / 250 mA
V
OUT
10 V - 20 V
t
on/off
(typ.)
750 ns & 200 ns
Dead Time
540 ns
(programmable up to 5
µ
s for IRS21094)
Product Summary
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1
V
CC
V
B
V
S
HO
LO
COM
IN
SD
SD
IN
up to 600 V
TO
LOAD
V
CC
IN
up to 600 V
TO
LOAD
V
CC
V
B
V
S
HO
LO
COM
IN
D
T
V
SS
SD
V
CC
SD
V
SS
R
DT
Description
The IRS2109/IRS21094 are high voltage, high
speed power MOSFET and IGBT drivers with de-
pendent high and low side referenced output
channels. Proprietary HVIC and latch immune
CMOS technologies enable ruggedized monolithic
construction. The logic input is compatible with stan-
dard CMOS or LSTTL output, down to 3.3 V logic.
The output drivers feature a high pulse current
buffer stage designed for minimum driver cross-con-
duction. The floating channel can be used to drive
an N-channel power MOSFET or IGBT in the high
side configuration which operates up to 600 V.
(Refer to Lead Assignments for correct
configuration). These diagrams show electrical
connections only. Please refer to our
Application Notes and DesignTips for proper
circuit board layout.
Packages
PRELIMINARY
8 Lead SOIC
14 Lead PDIP
8 Lead PDIP
14 Lead SOIC
PRELIMINARY
IRS2109/IRS21094(S)PbF
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2
Symbol
Definition
Min.
Max.
Units
V
B
High side floating absolute voltage
-0.3
625
V
S
High side floating supply offset voltage
V
B
- 25
V
B
+ 0.3
V
HO
High side floating output voltage
V
S
- 0.3
V
B
+ 0.3
V
CC
Low side and logic fixed supply voltage
-0.3
25
V
LO
Low side output voltage
-0.3
V
CC
+ 0.3
DT
Programmable dead-time pin voltage (IRS21094 only)
V
SS
- 0.3
V
CC
+ 0.3
V
IN
Logic input voltage (IN & SD)
V
SS
- 0.3
V
CC
+ 0.3
V
SS
Logic ground (IRS21094/IRS21894 only)
V
CC
- 25
V
CC
+ 0.3
dV
S
/dt
Allowable offset supply voltage transient
--
50
V/ns
(8 Lead PDIP)
--
1.0
P
D
Package power dissipation @ T
A
+25
°
C
(8 Lead SOIC)
--
0.625
(14 lead PDIP)
--
1.6
(14 lead SOIC)
--
1.0
(8 Lead PDIP)
--
125
Rth
JA
Thermal resistance, junction to ambient
(8 Lead SOIC)
--
200
(14 lead PDIP)
--
75
(14 lead SOIC)
--
120
T
J
Junction temperature
--
150
T
S
Storage temperature
-50
150
T
L
Lead temperature (soldering, 10 seconds)
--
300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
V
°
C
°
C/W
W
IRS2109/IRS21094(S)PbF
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3
PRELIMINARY
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, V
SS
= COM, C
L
= 1000 pF, T
A
= 25
°
C, DT = VSS unless otherwise specified.
Symbol
Definition
Min. Typ.
Max. Units Test Conditions
ton
Turn-on propagation delay
--
750
950
V
S
= 0 V
toff
Turn-off propagation delay
--
200
280
V
S
= 0 V or 600 V
tsd
Shut-down propagation delay
--
200
280
MT
Delay matching, HS & LS turn-on/off
--
0
70
tr
Turn-on rise time
--
100
220
tf
Turn-off fall time
--
35 80
DT
Deadtime: LO turn-off to HO turn-on(DT
LO-HO) &
400
540
680
R
DT
= 0
HO turn-off to LO turn-on (DT
HO-LO)
4
5
6
µ
s R
DT
= 200 k
(IR21094)
MDT
Deadtime matching = DT
LO - HO
- DT
HO-LO
--
0
60
R
DT
= 0
--
0
600
R
DT
= 200 k
(IR21094)
ns
ns
Note 1: Logic operational for V
S
of -5 V to +600 V. Logic state held for V
S
of -5 V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
VB
High side floating supply absolute voltage
V
S
+ 10
V
S
+ 20
V
S
High side floating supply offset voltage
(Note 1)
600
V
HO
High side floating output voltage
V
S
V
B
V
CC
Low side and logic fixed supply voltage
10
20
V
LO
Low side output voltage
0
V
CC
V
IN
Logic input voltage (IN & SD)
V
SS
V
CC
DT
Programmable dead-time pin voltage (IRS21094 only)
V
SS
V
CC
V
SS
Logic ground (IRS21094 only)
-5
5
T
A
Ambient temperature
-40
125
°
C
Symbol
Definition
Min.
Max.
Units
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig
.
1. For proper operation the device should be used within the
recommended conditions. The V
S
and V
SS
offset rating are tested with all supplies biased at a 15 V differential.
V
V
S
= 0 V
PRELIMINARY
IRS2109/IRS21094(S)PbF
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4
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, V
SS
= COM, DT= V
SS
and T
A
= 25
°
C unless otherwise specified. The V
IL
, V
IH,
and I
IN
parameters are referenced to V
SS
/COM and are applicable to the respective input leads: IN and SD. The V
O
, I
O,
and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
Definition
Min.
Typ. Max. Units Test Conditions
V
IH
Logic "1" input voltage for HO & logic "0" for LO
2.5
--
--
V
IL
Logic "0" input voltage for HO & logic "1" for LO
--
--
0.8
V
SD,TH+
SD input positive going threshold
2.5
--
--
V
SD,TH-
SD input negative going threshold
--
--
0.8
V
OH
High level output voltage, V
BIAS
- V
O
--
0.05
0.2
V
OL
Low level output voltage, V
O
--
0.02
0.1
I
LK
Offset supply leakage current
--
--
50
V
B
= V
S
= 600 V
I
QBS
Quiescent V
BS
supply current
20
75
130
V
IN
= 0 V or 5 V
I
QCC
Quiescent V
CC
supply current
0.4
1.0
1.6
mA
V
IN
= 0 V or 5 V
R
DT
= 0
I
IN+
Logic "1" input bias current
--
5
20
IN = 5 V, SD = 0 V
I
IN-
Logic "0" input bias current
--
--
2
IN = 0 V, SD = 5 V
V
CCUV+
V
CC
and V
BS
supply undervoltage positive going
8.0
8.9
9.8
V
BSUV+
threshold
V
CCUV-
V
CC
and V
BS
supply undervoltage negative going
7.4
8.2
9.0
V
BSUV-
threshold
V
CCUVH
Hysteresis
0.3
0.7
--
V
BSUVH
I
O+
Output high short circuit pulsed vurrent
120
290
--
V
O
= 0 V, PW
10
µ
s
I
O-
Output low short circuit pulsed current
250
600
--
V
O
= 15 V,PW
10
µ
s
V
µ
A
V
µ
A
mA
V
CC
= 10 V to 20 V
I
O
= 2 mA
IRS2109/IRS21094(S)PbF
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5
PRELIMINARY
Functional Block Diagrams
IRS2109
SD
UV
DETECT
DELAY
COM
LO
VCC
IN
VS
HO
VB
PULSE
FILTER
HV
LEVEL
SHIFTER
R
R
S
Q
UV
DETECT
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
+5V
DEADTIME
SD
UV
DETECT
DELAY
COM
LO
VCC
IN
DT
VSS
VS
HO
VB
PULSE
FILTER
HV
LEVEL
SHIFTER
R
R
S
Q
UV
DETECT
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
+5V
DEADTIME
IRS21094
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