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IRF9530NS/L
HEXFET
®
Power MOSFET
PD - 91523A
l
Advanced Process Technology
l
Surface Mount (IRF9530NS)
l
Low-profile through-hole (IRF9530NL)
l
175°C Operating Temperature
l
Fast Switching
l
P-Channel
l
Fully Avalanche Rated
5/13/98
S
D
G
Parameter
Typ.
Max.
Units
R
JC
Junction-to-Case
1.9
R
JA
Junction-to-Ambient ( PCB Mounted,steady-state)**
40
Thermal Resistance
°C/W
Parameter
Max.
Units
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ -10V
-14
I
D
@ T
C
= 100°C
Continuous Drain Current, V
GS
@ -10V
-10
A
I
DM
Pulsed Drain Current
-56
P
D
@T
A
= 25°C
Power Dissipation
3.8
W
P
D
@T
C
= 25°C
Power Dissipation
79
W
Linear Derating Factor
0.53
W/°C
V
GS
Gate-to-Source Voltage
± 20
V
E
AS
Single Pulse Avalanche Energy
250
mJ
I
AR
Avalanche Current
-8.4
A
E
AR
Repetitive Avalanche Energy
7.9
mJ
dv/dt
Peak Diode Recovery dv/dt
-5.0
V/ns
T
J
Operating Junction and
-55 to + 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
°C
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D
2
Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRF9530NL) is available for low-
profile applications.
Description
V
DSS
= -100V
R
DS(on)
= 0.20
I
D
= -14A
2
D P ak
T O -26 2
IRF9530NS/L
Starting T
J
= 25°C, L =7.0mH
R
G
= 25
, I
AS
= -8.4A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Notes:
** When mounted on 1" square PCB (FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
I
SD
-8.4A, di/dt
-490A/µs, V
DD
V
(BR)DSS
,
T
J
175°C
Pulse width
300µs; duty cycle
2%.
Uses IRF9530N data and test conditions
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
-1.6
V
T
J
= 25°C, I
S
= -8.4A, V
GS
= 0V
t
rr
Reverse Recovery Time
130
190
ns
T
J
= 25°C, I
F
= -8.4A
Q
rr
Reverse Recovery Charge
650
970
nC
di/dt = -100A/µs
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Source-Drain Ratings and Characteristics
A
S
D
G
Parameter
Min. Typ. Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
-100
V
V
GS
= 0V, I
D
= -250µA
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
-0.11
V/°C
Reference to 25°C, I
D
= -1mA
R
DS(on)
Static Drain-to-Source On-Resistance
0.20
V
GS
= -10V, I
D
= -8.4A
V
GS(th)
Gate Threshold Voltage
-2.0
-4.0
V
V
DS
= V
GS
, I
D
= -250µA
g
fs
Forward Transconductance
3.2
S
V
DS
= -50V, I
D
= -8.4A
-25
µ A
V
DS
= -100V, V
GS
= 0V
-250
V
DS
= -80V, V
GS
= 0V, T
J
= 150°C
Gate-to-Source Forward Leakage
100
V
GS
= 20V
Gate-to-Source Reverse Leakage
-100
nA
V
GS
= -20V
Q
g
Total Gate Charge
58
I
D
= -8.4A
Q
gs
Gate-to-Source Charge
8.3
nC
V
DS
= -80V
Q
gd
Gate-to-Drain ("Miller") Charge
32
V
GS
= -10V, See Fig. 6 and 13
t
d(on)
Turn-On Delay Time
15
V
DD
= -50V
t
r
Rise Time
58
I
D
= -8.4A
t
d(off)
Turn-Off Delay Time
45
R
G
= 9.1
t
f
Fall Time
46
R
D
= 6.2
,
See Fig. 10
Between lead,
and center of die contact
C
iss
Input Capacitance
760
V
GS
= 0V
C
oss
Output Capacitance
260
pF
V
DS
= -25V
C
rss
Reverse Transfer Capacitance
170
= 1.0MHz, See Fig. 5
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
I
GSS
ns
I
DSS
Drain-to-Source Leakage Current
nH
7.5
L
S
Internal Source Inductance
-14
-56
IRF9530NS/L
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0 . 1
1
1 0
1 0 0
0 . 1
1
1 0
1 0 0
D
D S
20 µ s P U L S E W ID T H
T = 25 °C
c
A
-I
,
D
r
a
i
n
-
t
o
-S
o
u
rc
e
C
u
rre
n
t
(A
)
-V , D rain-to-S o urce V oltage (V )
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
-4 .5V
0.1
1
1 0
1 0 0
0.1
1
1 0
1 0 0
D
D S
A
-
I
,
Dr
ai
n
-
t
o
-
S
ou
r
c
e Cur
r
e
n
t
(
A
)
-V , D rain-to-S ource V oltage (V )
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
-4.5V
2 0µ s P U LS E W ID T H
T = 1 75 °C
C
0 . 1
1
1 0
1 0 0
4
5
6
7
8
9
1 0
T = 2 5 °C
J
G S
D
A
-I
,
D
r
a
i
n
-
t
o
-S
o
u
rc
e
C
u
rre
n
t
(A
)
-V , Ga te -to-S ource V olta ge (V )
V = -5 0 V
2 0µ s P U L S E W ID TH
T = 1 7 5 °C
DS
J
T
J
= 25°C
T
J
= 175°C
-60 -40 -20
0
20
40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V
=
I =
GS
D
-10V
-14A
IRF9530NS/L
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
4 0 0
8 0 0
1 2 0 0
1 6 0 0
2 0 0 0
1
1 0
1 0 0
C
,
Cap
ac
i
t
a
n
c
e
(
p
F
)
A
D S
-V , D rain-to-S ourc e V oltage (V )
V = 0V , f = 1 M H z
C = C + C , C S H O R TE D
C = C
C = C + C
G S
iss g s g d d s
rs s g d
o ss ds g d
C
is s
C
os s
C
rs s
0 . 1
1
1 0
1 0 0
0 . 4
0 . 6
0 . 8
1 . 0
1 . 2
1 . 4
1 . 6
T = 2 5°C
T = 15 0°C
J
J
V = 0 V
G S
S D
SD
A
-
I
,
Rev
er
s
e
D
r
a
i
n Cur
r
e
n
t
(
A
)
-V , S ourc e -to-D rain V oltag e (V )
0
10
20
30
40
50
60
0
5
10
15
20
Q , Total Gate Charge (nC)
-V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
-8.4A
V
= -20V
DS
V
= -50V
DS
V
= -80V
DS
1
10
100
1000
1
10
100
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
Single Pulse
T
T
= 175 C
= 25 C
°
°
J
C
-V , Drain-to-Source Voltage (V)
-I , Drain Current (A)
I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
IRF9530NS/L
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
V
DS
-10V
Pulse Width
1
µs
Duty Factor
0.1 %
R
D
V
GS
V
DD
R
G
D.U.T.
+
-
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
0 . 0 1
0 . 1
1
1 0
0 . 0 0 0 0 1
0 . 0 0 0 1
0 . 0 0 1
0 . 0 1
0 . 1
1
t , R e c ta n g ula r P u lse D u ratio n (s e c )
1
th
J
C
D = 0 .5 0
0 .0 1
0 .0 2
0 .0 5
0 .1 0
0 .2 0
S IN G L E P U L S E
( T H E R M A L R E S P O N S E )
A
T
her
m
a
l
R
e
s
pons
e
(
Z
)
P
t
2
1
t
D M
N o te s:
1 . D u ty fa c to r D = t / t
2. P e a k T = P x Z + T
1
2
J
D M
th JC
C
25
50
75
100
125
150
175
0
2
4
6
8
10
12
14
T , Case Temperature ( C)
-I , Drain Current (A)
°
C
D
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