IRF7304
HEXFET
®
Power MOSFET
PD - 9.1240B
Description
PRELIMINARY
Absolute Maximum Ratings
SO-8
Thermal Resistance
** When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
Generation V Technology
Ultra Low On-Resistance
Dual P-Channel Mosfet
Surface Mount
Available in Tape & Reel
Dynamic dv/dt Rating
Fast Switching
Fifth Generation HEXFETs from International Rectifier utilize advanced processing
techniques to achieve the lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and ruggedized device design for
which HEXFET Power MOSFETs are well known, provides the designer with an
extremely efficient device for use in a wide variety of applications.
The SO-8 has been modified through a customized leadframe for enhanced
thermal characteristics and multiple-die capability making it ideal in a variety of
power applications. With these improvements, multiple devices can be used in an
application with dramatically reduced board space. The package is designed for
vapor phase, infra-red, or wave soldering techniques. Power dissipation of greater
than 0.8W is possible in a typical PCB mount application.
V
DSS
= -20V
R
DS(on)
= 0.090
Parameter
Min.
Typ.
Max.
Units
R
JA
Junction-to-Amb. (PCB Mount, steady state)**
90
°C/W
D1
D1
D2
D2
G1
S2
G2
S1
Top View
8
1
2
3
4
5
6
7
Parameter
Max.
Units
I
D
@ T
A
= 25°C
10 Sec. Pulsed Drain Current, V
GS
@ -4.5V
-4.0
A
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ -4.5V
-3.6
A
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ -4.5V
-2.9
A
I
DM
Pulsed Drain Current
-14
A
P
D
@T
A
= 25°C
Power Dissipation (PCB Mount)**
1.4
W
Linear Derating Factor (PCB Mount)**
0.011
W/°C
V
GS
Gate-to-Source Voltage
±8.0
V
dv/dt
Peak Diode Recovery dv/dt
-1.2
V/ns
T
J,
T
STG
Junction and Storage Temperature Range
-55 to + 150
°C
127
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128
IRF7304
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
1.8
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
-14
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
-1.0
V
T
J
= 25°C, I
S
= -1.8A, V
GS
= 0V
t
rr
Reverse Recovery Time
56
84
ns
T
J
= 25°C, I
F
= -2.2A
Q
rr
Reverse RecoveryCharge
71
110
µC
di/dt = 100A/µs
t
on
Forward Turn-On Time
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
I
GSS
I
DSS
Drain-to-Source Leakage Current
L
S
Internal Source Inductance
6.0
L
D
Internal Drain Inductance
4.0
nH
ns
nA
µA
R
DS(ON)
Static Drain-to-Source On-Resistance
Parameter
Min. Typ. Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
-20
V
V
GS
= 0V, ID = -250µA
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
-0.012
V/°C Reference to 25°C, I
D
= -1mA
0.090
V
GS
= -4.5V, I
D
= -2.2A
0.140
V
GS
= -2.7V, I
D
= -1.8A
V
GS(th)
Gate Threshold Voltage
-0.70
V
V
DS
= V
GS
, I
D
= -250µA
g
fs
Forward Transconductance
4.0
S
V
DS
= -16V, I
D
= -2.2A
-1.0
V
DS
= -16V, V
GS
= 0V
-25
V
DS
= -16V, V
GS
= 0V, T
J
= 125°C
Gate-to-Source Forward Leakage
-100
V
GS
= -8.0V
Gate-to-Source Reverse Leakage
100
V
GS
= 8.0V
Q
g
Total Gate Charge
22
I
D
= -2.2A
Q
gs
Gate-to-Source Charge
3.3
nC
V
DS
= -16V
Q
gd
Gate-to-Drain ("Miller") Charge
9.0
V
GS
= -4.5V, See Fig. 6 and 12
t
d(on)
Turn-On Delay Time
8.4
V
DD
= -10V
t
r
Rise Time
26
I
D
= -2.2A
t
d(off)
Turn-Off Delay Time
51
R
G
= 6.0
t
f
Fall Time
33
R
D
= 4.5
,
See Fig. 10
Between lead tip
and center of die contact
C
iss
Input Capacitance
610
V
GS
= 0V
C
oss
Output Capacitance
310
pF
V
DS
= -15V
C
rss
Reverse Transfer Capacitance
170
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
A
Pulse width
300µs; duty cycle
2%.
I
SD
-2.2A, di/dt
-
50A/µs, V
DD
V
(BR)DSS
, T
J
150°C
Repetitive rating; pulse width limited by max. junction
temperature. ( See fig. 11 )
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129
IRF7304
Fig 2. Typical Output Characteristics,
T
J
= 150
o
C
Fig 1. Typical Output Characteristics,
T
J
= 25
o
C
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
0.1
1
10
100
0.01
0.1
1
10
100
D
DS
20µs PULSE WIDTH
T = 25°C
A
-
I
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
-V , Drain-to-Source Voltage (V)
J
VGS
TOP - 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
-1.5V
0.1
1
10
100
0.01
0.1
1
10
100
D
DS
20µs PULSE WIDTH
T = 150°C
A
-
I
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
-V , Drain-to-Source Voltage (V)
J
VGS
TOP - 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
-1.5V
0.1
1
10
100
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
T = 25°C
T = 150°C
J
J
GS
D
A
-
I
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
-V , Gate-to-Source Voltage (V)
V = -15V
20µs PULSE WIDTH
DS
0.0
0.5
1.0
1.5
2.0
-60 -40 -20
0
20
40
60
80
100 120 140 160
J
T , Junction Temperature (°C)
R
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
D
S
(
o
n
)
(
N
o
r
m
a
l
i
z
e
d
)
A
I = -3.6A
D
V = -4.5V
GS
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130
IRF7304
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
0
500
1000
1500
1
10
100
C
,
C
a
p
a
c
i
t
a
n
c
e
(
p
F
)
A
DS
-V , Drain-to-Source Voltage (V)
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
2
4
6
8
10
0
5
10
15
20
25
G
G
S
A
FOR TEST CIRCUIT
SEE FIGURE 12
-
V
,
G
a
t
e
-
t
o
-
S
o
u
r
c
e
V
o
l
t
a
g
e
(
V
)
Q , Total Gate Charge (nC)
I = -2.2A
V = -16V
D
DS
0.1
1
10
100
0.3
0.6
0.9
1.2
1.5
T = 25°C
T = 150°C
J
J
V = 0V
GS
SD
S
D
A
-
I
,
R
e
v
e
r
s
e
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
-V , Source-to-Drain Voltage (V)
To Order
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131
IRF7304
Fig 10b. Switching Time Waveforms
Fig 10a. Switching Time Test Circuit
Fig 8. Maximum Safe Operating Area
Fig 9. Maximum Drain Current Vs. Ambient
Temperature
0.1
1
10
100
0.1
1
10
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
T = 25°C
T = 150°C
Single Pulse
1ms
A
-
I
,
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
-V , Drain-to-Source Voltage (V)
DS
D
A
J
10ms
100ms
0.0
1.0
2.0
3.0
4.0
25
50
75
100
125
150
A
-
I
,
D
r
a
i
n
C
u
r
r
e
n
t
(
A
m
p
s
)
D
A
T , Ambient Temperature (°C)
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132
IRF7304
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
0.1
1
10
100
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t , Rectangular Pulse Duration (sec)
1
D = 0.50
0.01
0.02
0.05
0.10
0.20
SINGLE PULSE
(THERMAL RESPONSE)
A
T
h
e
r
m
a
l
R
e
s
p
o
n
s
e
(
Z
)
t
h
J
A
P
t
2
1
t
DM
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1
2
J
DM
thJA
A
Fig 12b. Gate Charge Test Circuit
Fig 12a. Basic Gate Charge Waveform
Refer to the Appendix Section for the following:
Appendix A:
Figure 14, Peak Diode Recovery dv/dt Test Circuit -- See page 328.
Appendix B:
Package Outline Mechanical Drawing -- See page 332.
Appendix C:
Part Marking Information -- See page 332.
Appendix D:
Tape and Reel Information -- See page 336.
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