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Part Number IRF1310NS

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IRF1310NS/L
HEXFET
®
Power MOSFET
PD - 91514B
l
Advanced Process Technology
l
Surface Mount (IRF1310NS)
l
Low-profile through-hole (IRF1310NL)
l
175°C Operating Temperature
l
Fast Switching
l
Fully Avalanche Rated
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D
2
Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRF1310NL) is available for low-
profile applications.
Description
V
DSS
=100V
R
DS(on)
= 0.036
I
D
= 42A
2
D P ak

T O -26 2
Parameter
Typ.
Max.
Units
R
JC
Junction-to-Case
­­­
0.95
R
JA
Junction-to-Ambient ( PCB Mounted,steady-state)**
­­­
40
Thermal Resistance
°C/W
Parameter
Max.
Units
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V
42
I
D
@ T
C
= 100°C
Continuous Drain Current, V
GS
@ 10V
30
A
I
DM
Pulsed Drain Current
140
P
D
@T
A
= 25°C
Power Dissipation
3.8
W
P
D
@T
C
= 25°C
Power Dissipation
160
W
Linear Derating Factor
1.1
W/°C
V
GS
Gate-to-Source Voltage
± 20
V
E
AS
Single Pulse Avalanche Energy
420
mJ
I
AR
Avalanche Current
22
A
E
AR
Repetitive Avalanche Energy
16
mJ
dv/dt
Peak Diode Recovery dv/dt
5.0
V/ns
T
J
Operating Junction and
-55 to + 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
°C
S
D
G
5/13/98
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IRF1310NS/L
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
100
­­­
­­­
V
V
GS
= 0V, I
D
= 250µA
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
­­­
0.11
­­­
V/°C
Reference to 25°C, I
D
= 1mA
R
DS(on)
Static Drain-to-Source On-Resistance
­­­
­­­ 0.036
V
GS
= 10V, I
D
= 22A
V
GS(th)
Gate Threshold Voltage
2.0
­­­
4.0
V
V
DS
= V
GS
, I
D
= 250µA
g
fs
Forward Transconductance
14
­­­
­­­
S
V
DS
= 25V, I
D
= 22A
­­­
­­­
25
µ A
V
DS
= 100V, V
GS
= 0V
­­­
­­­
250
V
DS
= 80V, V
GS
= 0V, T
J
= 150°C
Gate-to-Source Forward Leakage
­­­
­­­
100
V
GS
= 20V
Gate-to-Source Reverse Leakage
­­­
­­­
-100
n A
V
GS
= -20V
Q
g
Total Gate Charge
­­­
­­­
110
I
D
= 22A
Q
gs
Gate-to-Source Charge
­­­
­­­
15
nC
V
DS
= 80V
Q
gd
Gate-to-Drain ("Miller") Charge
­­­
­­­
58
V
GS
= 10V, See Fig. 6 and 13
t
d(on)
Turn-On Delay Time
­­­
11
­­­
V
DD
= 50V
t
r
Rise Time
­­­
56
­­­
I
D
= 22A
t
d(off)
Turn-Off Delay Time
­­­
45
­­­
R
G
= 3.6
t
f
Fall Time
­­­
40
­­­
R
D
= 2.9
,
See Fig. 10
Between lead,
­­­
­­­
and center of die contact
C
iss
Input Capacitance
­­­
1900 ­­­
V
GS
= 0V
C
oss
Output Capacitance
­­­
450
­­­
pF
V
DS
= 25V
C
rss
Reverse Transfer Capacitance
­­­
230
­­­
= 1.0MHz, See Fig. 5
I
GSS
ns
I
DSS
Drain-to-Source Leakage Current
nH
7.5
L
S
Internal Source Inductance
Starting T
J
= 25°C, L = 1.7mH
R
G
= 25
, I
AS
= 22A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Notes:
I
SD
22A, di/dt
180A/µs, V
DD
V
(BR)DSS
,
T
J
175°C
Pulse width
300µs; duty cycle
2%.
Uses IRF1310N data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended soldering techniques refer to application note #AN-994.
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
MOSFET symbol
(Body Diode)
­­­
­­­
showing the
I
SM
Pulsed Source Current
integral reverse
(Body Diode)
­­­
­­­
p-n junction diode.
V
SD
Diode Forward Voltage
­­­
­­­
1.3
V
T
J
= 25°C, I
S
=22A, V
GS
= 0V
t
rr
Reverse Recovery Time
­­­
180
270
ns
T
J
= 25°C, I
F
= 22A
Q
rr
Reverse Recovery Charge
­­­
1.2
1.8
µC
di/dt = 100A/µs
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Source-Drain Ratings and Characteristics
S
D
G
42
140
A
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IRF1310NS/L
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
1000
0.1
1
10
100
20us PULSE WIDTH
T = 25 C
J
o
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
1000
0.1
1
10
100
20us PULSE WIDTH
T = 175 C
J
o
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
1000
4.0
5.0
6.0
7.0
8.0
9.0
10.0
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J
o
T = 175 C
J
o
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
o
V
=
I =
GS
D
10V
36A
Fig 4. Normalized On-Resistance
Vs. Temperature
V
DS
= 50V
20µ
S
PULSE WIDTH
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IRF1310NS/L
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
1
10
100
0
500
1000
1500
2000
2500
3000
3500
V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss
gs
gd ,
ds
rss
gd
oss
ds
gd
C
iss
C
oss
C
rss
0
20
40
60
80
100
120
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
22A
V
= 20V
DS
V
= 50V
DS
V
= 80V
DS
0.1
1
10
100
1000
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
1
10
100
1000
1
10
100
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
Single Pulse
T
T
= 175 C
= 25 C
J
C
o
o
V , Drain-to-Source Voltage (V)
I , Drain Current (A)
I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
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IRF1310NS/L
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
V
DS
Pulse Width
1
µs
Duty Factor
0.1 %
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
25
50
75
100
125
150
175
0
10
20
30
40
50
T , Case Temperature
( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001
0.0001
0.001
0.01
0.1
1
Notes:
1. Duty factor D =
t / t
2. Peak T = P
x Z
+ T
1
2
J
DM
thJC
C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response
(Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)