IR2184

(

)(S)

Typical Connection

HALF-BRIDGE DRIVER

Features

Floating channel designed for bootstrap operation

Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune

Gate drive supply range from 10 to 20V

Undervoltage lockout for both channels

3.3V and 5V input logic compatible

Matched propagation delay for both channels

Logic and power ground +/- 5V offset.

Lower di/dt gate driver for better noise immunity

Output source/sink current capability 1.4A/1.8A

Description

IR21844

IR2184

www.irf.com

Data Sheet No. PD60174-D

COM

up to 600V

LOAD

up to 600V

LOAD

COM

(Refer to Lead Assignments for correct
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.

Packages

14-Lead PDIP

IR21844

8-Lead SOIC

IR2184S

14-Lead SOIC

IR21844S

8-Lead PDIP

IR2184

The IR2184(4)(S) are high voltage,
high speed power MOSFET and IGBT
drivers with dependent high and low
side referenced output channels. Pro-
prietary HVIC and latch immune
CMOS technologies enable rugge-
dized monolithic construction. The
logic input is compatible with standard
CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a high
pulse current buffer stage designed for
minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or
IGBT in the high side configuration which operates up to 600 volts.

Part

Input

logic

Cross-

conduction

prevention

logic

Dead-Time

Ground Pins

Ton/Toff

2181

COM

21814

HIN/LIN

none

VSS/COM

180/220 ns

2183

Internal 500ns

COM

21834

HIN/LIN

yes

Program 0.4 ~ 5 us

VSS/COM

180/220 ns

2184

Internal 500ns

COM

21844

IN/SD

yes

Program 0.4 ~ 5 us

VSS/COM

680/270 ns

IR2181/IR2183/IR2184 Feature Comparison

IR2184

(

)

(S)

www.irf.com

Symbol

Definition

Min.

Max.

Units

High side floating absolute voltage

-0.3

625

High side floating supply offset voltage

- 25

+ 0.3

High side floating output voltage

- 0.3

+ 0.3

Low side and logic fixed supply voltage

-0.3

Low side output voltage

-0.3

+ 0.3

Programmable dead-time pin voltage (IR21844 only)

- 0.3

+ 0.3

Logic input voltage (IN & SD)

- 0.3

+ 10

Logic ground (IR21844 only)

- 25

+ 0.3

/dt

Allowable offset supply voltage transient

V/ns

Package power dissipation @ T

+25°C

(8-lead PDIP)

1.0

(8-lead SOIC)

0.625

(14-lead PDIP)

1.6

(14-lead SOIC)

1.0

Rth

Thermal resistance, junction to ambient

(8-lead PDIP)

125

(8-lead SOIC)

200

(14-lead PDIP)

(14-lead SOIC)

120

Junction temperature

150

Storage temperature

-50

150

Lead temperature (soldering, 10 seconds)

300

°C

°C/W

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.

Recommended Operating Conditions

The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V

and V

offset rating are tested with all supplies biased at 15V differential.

Note 1: Logic operational for V

of -5 to +600V. Logic state held for V

of -5V to -V

. (Please refer to the Design Tip

DT97-3 for more details).
Note 2: IN and SD are internally clamped with a 5.2V zener diode.

High side floating supply absolute voltage

+ 10

+ 20

High side floating supply offset voltage

Note 1

600

High side floating output voltage

Low side and logic fixed supply voltage

Low side output voltage

Logic input voltage (IN & SD)

+ 5

Programmable dead-time pin voltage (IR21844 only)

Logic ground (IR21844 only)

-5

Ambient temperature

-40

125

°C

Symbol

Definition

Min.

Max.

Units

IR2184

(

)

(S)

www.irf.com

Dynamic Electrical Characteristics

BIAS

, V

) = 15V, V

= COM, C

= 1000 pF, T

= 25°C, DT = VSS unless otherwise specified.

Symbol

Definition

Min. Typ.

Max. Units Test Conditions

ton

Turn-on propagation delay

680

900

= 0V

toff

Turn-off propagation delay

270

400

= 0V or 600V

tsd

Shut-down propagation delay

180

270

MTon

Delay matching, HS & LS turn-on

MToff

Delay matching, HS & LS turn-off

Turn-on rise time

= 0V

Turn-off fall time

= 0V

Deadtime: LO turn-off to HO turn-on(DT

LO-HO) &

280

400

520

RDT= 0

HO turn-off to LO turn-on (DT

HO-LO)

sec

RDT = 200k

MDT

Deadtime matching = DT

LO - HO

- DT

HO-LO

RDT=0

600

RDT = 200k

nsec

Static Electrical Characteristics

BIAS

, V

) = 15V, V

= COM, DT= V

and T

= 25°C unless otherwise specified. The V

, V

and I

parameters are referenced to V

/COM and are applicable to the respective input leads: IN and SD. The V

, I

and Ron

parameters are referenced to COM and are applicable to the respective output leads: HO and LO.

Symbol

Definition

Min.

Typ. Max. Units Test Conditions

Logic "1" input voltage for HO & logic "0" for LO

2.7

= 10V to 20V

Logic "0" input voltage for HO & logic "1" for LO

0.8

= 10V to 20V

SD,TH+

SD input positive going threshold

2.7

= 10V to 20V

SD,TH-

SD input negative going threshold

0.8

= 10V to 20V

High level output voltage, V

BIAS

- V

1.2

= 0A

Low level output voltage, V

0.1

= 0A

Offset supply leakage current

= V

= 600V

QBS

Quiescent V

supply current

150

= 0V or 5V

QCC

Quiescent V

supply current

0.4

1.0

1.6

= 0V or 5V

IN+

Logic "1" input bias current

IN = 5V, SD = 0V

IN-

Logic "0" input bias current

IN = 0V, SD = 5V

CCUV+

and V

supply undervoltage positive going

8.0

8.9

9.8

BSUV+

threshold

CCUV-

and V

dupply undervoltage negative going

7.4

8.2

9.0

BSUV-

threshold

CCUVH

Hysteresis

0.3

0.7

BSUVH

O+

Output high short circuit pulsed vurrent

1.4

1.9

= 0V,

10 µs

O-

Output low short circuit pulsed current

1.8

2.3

= 15V,

10 µs

µA

IR2184

(

)

(S)

www.irf.com

Functional Block Diagrams

2184

S D

DETECT

DELAY

V S

H O

V B

PULSE

FILTER

LEVEL

SHIFTER

DETECT

PULSE

GENERATOR

V S S / C O M

LEVEL

SHIFT

V S S / C O M

LEVEL

SHIFT

+5V

DEADTIME

C O M

L O

V C C

2 1 8 4 4

S D

D E T E C T

D E L A Y

D T

V S S

V S

H O

V B

P U L S E
F I L T E R

L E V E L

S H I F T E R

D E T E C T

P U L S E

G E N E R A T O R

V S S / C O M

L E V E L

S H I F T

V S S / C O M

L E V E L

S H I F T

+5V

D E A D T I M E

C O M

L O

V C C

IR2184

(

)

(S)

www.irf.com

14-Lead PDIP

14-Lead SOIC

IR21844

IR21844S

Lead Assignments

8-Lead PDIP

8-Lead SOIC

Lead Definitions

Symbol Description

Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM

for IR2184 and VSS for IR21844)

Logic input for shutdown (referenced to

COM for IR2184 and VSS for IR21844)

Programmable dead-time lead, referenced to VSS. (IR21

4 only)

VSS

Logic Ground (21

4 only)

High side floating supply

High side gate drive output

High side floating supply return

Low side and logic fixed supply

Low side gate drive output

COM

Low side return

IR2184

IR2184S

COM

VCC

COM

VCC

VSS

COM

VCC

VSS

COM

VCC

Part Number IR2184