Data Sheet No. PD-6.043C
IR2101
Typical Connection
Features
n
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
n
Gate drive supply range from 10 to 20V
n
Undervoltage lockout
n
5V Schmitt-triggered input logic
n
Matched propagation delay for both channels
n
Outputs in phase with inputs
Description
The IR2101 is a high voltage, high speed power
MOSFET and IGBT driver with independent high and
low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable rugge-
dized monolithic construction. The logic input is com-
patible with standard CMOS or LSTTL outputs. The
output drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction. The
floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high side configura-
tion which operates up to 600 volts.
HIGH AND LOW SIDE DRIVER
Packages
Product Summary
V
OFFSET
600V max.
I
O
+/-
100 mA / 210 mA
V
OUT
10 - 20V
t
on/off
(typ.)
130 & 90 ns
Delay Matching
30 ns
V
CC
V
B
V
S
HO
LO
COM
HIN
LIN
LIN
HIN
up to 600V
TO
LOAD
V
CC
C
ONTROL
I
NTEGRATED
C
IRCUIT
D
ESIGNERS
M
ANUAL
B-1
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IR2101
B-2
C
ONTROL
I
NTEGRATED
C
IRCUIT
D
ESIGNERS
M
ANUAL
Parameter
Value
Symbol
Definition
Min.
Max.
Units
V
B
High Side Floating Supply Voltage
-0.3
625
V
S
High Side Floating Supply Offset Voltage
V
B
- 25
V
B
+ 0.3
V
HO
High Side Floating Output Voltage
V
S
- 0.3
V
B
+ 0.3
V
CC
Low Side and Logic Fixed Supply Voltage
-0.3
25
V
LO
Low Side Output Voltage
-0.3
V
CC
+ 0.3
V
IN
Logic Input Voltage (HIN & LIN)
-0.3
V
CC
+ 0.3
dV
s
/dt
Allowable Offset Supply Voltage Transient
--
50
V/ns
P
D
Package Power Dissipation @ T
A
+25°C
(8 Lead DIP)
--
1.0
(8 Lead SOIC)
--
0.625
R
JA
Thermal Resistance, Junction to Ambient
(8 Lead DIP)
--
125
(8 Lead SOIC)
--
200
T
J
Junction Temperature
--
150
T
S
Storage Temperature
-55
150
°C
T
L
Lead Temperature (Soldering, 10 seconds)
--
300
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Parameter
Value
Symbol
Definition
Min.
Max.
Units
V
B
High Side Floating Supply Absolute Voltage
V
S
+ 10
V
S
+ 20
V
S
High Side Floating Supply Offset Voltage
Note 1
600
V
HO
High Side Floating Output Voltage
V
S
V
B
V
CC
Low Side and Logic Fixed Supply Voltage
10
20
V
LO
Low Side Output Voltage
0
V
CC
V
IN
Logic Input Voltage (HIN & LIN)
0
V
CC
T
A
Ambient Temperature
-40
125
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
.
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
°C
V
W
°C/W
V
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IR2101
C
ONTROL
I
NTEGRATED
C
IRCUIT
D
ESIGNERS
M
ANUAL
B-3
Parameter
Value
Symbol
Definition
Min.
Typ. Max. Units Test Conditions
V
IH
Logic "1" Input Voltage
2.7
--
--
V
CC
= 10V to 20V
V
IL
Logic "0" Input Voltage
--
--
0.8
V
CC
= 10V to 20V
V
OH
High Level Output Voltage, V
BIAS
- V
O
--
--
100
I
O
= 0A
V
OL
Low Level Output Voltage, V
O
--
--
100
I
O
= 0A
I
LK
Offset Supply Leakage Current
--
--
50
V
B
= V
S
= 600V
I
QBS
Quiescent V
BS
Supply Current
--
20
50
V
IN
= 0V or 5V
I
QCC
Quiescent V
CC
Supply Current
--
140
240
µA
V
IN
= 0V or 5V
I
IN+
Logic "1" Input Bias Current
--
20
40
V
IN
= 5V
I
IN-
Logic "0" Input Bias Current
--
--
1.0
V
IN
= 0V
V
CCUV+
V
CC
Supply Undervoltage Positive Going
8.8
9.3
9.8
Threshold
V
CCUV-
V
CC
Supply Undervoltage Negative Going
7.5
8.2
8.6
Threshold
I
O+
Output High Short Circuit Pulsed Current
100
125
--
V
O
= 0V, V
IN
= 5V
PW
10 µs
I
O-
Output Low Short Circuit Pulsed Current
210
250
--
V
O
= 15V, V
IN
= 0V
PW
10 µs
Parameter
Value
Symbol
Definition
Min.
Typ. Max. Units Test Conditions
t
on
Turn-On Propagation Delay
--
130
200
V
S
= 0V
t
off
Turn-Off Propagation Delay
--
90
200
V
S
= 600V
t
r
Turn-On Rise Time
--
80
120
ns
t
f
Turn-Off Fall Time
--
40
70
MT
Delay Matching, HS & LS Turn-On/Off
--
30
--
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V and T
A
= 25°C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to COM.
The V
O
and I
O
parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, C
L
= 1000 pF and T
A
= 25°C unless otherwise specified.
mV
V
V
mA
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IR2101
B-4
C
ONTROL
I
NTEGRATED
C
IRCUIT
D
ESIGNERS
M
ANUAL
Functional Block Diagram
Lead Assignments
8 Lead DIP
SO-8
IR2101
IR2101S
Lead Definitions
Lead
Symbol
Description
HIN
Logic input for high side gate driver output (HO), in phase
LIN
Logic input for low side gate driver output (LO), in phase
V
B
High side floating supply
HO
High side gate drive output
V
S
High side floating supply return
V
CC
Low side and logic fixed supply
LO
Low side gate drive output
COM
Low side return
PULSE
GEN
HIN
UV
DETECT
LIN
COM
HO
V
S
V
CC
LO
V
B
R
Q
S
PULSE
FILTER
HV
LEVEL
SHIFT
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IR2101
C
ONTROL
I
NTEGRATED
C
IRCUIT
D
ESIGNERS
M
ANUAL
B-5
Thickness of Gate Oxide
800
Å
Connections
Material
Poly Silicon
First
Width
4 µm
Layer
Spacing
6 µm
Thickness
5000Å
Material
Al - Si (Si: 1.0% ±0.1%)
Second
Width
6 µm
Layer
Spacing
9 µm
Thickness
20,000Å
Contact Hole Dimension
5 µm X 5 µm
Insulation Layer
Material
PSG (SiO
2
)
Thickness
1.5 µm
Passivation
Material
PSG (SiO
2
)
Thickness
1.5 µm
Method of Saw
Full Cut
Method of Die Bond
Ablebond 84 - 1
Wire Bond
Method
Thermo Sonic
Material
Au (1.0 mil / 1.3 mil)
Leadframe
Material
Cu
Die Area
Ag
Lead Plating
Pb : Sn (37 : 63)
Package
Types
8 Lead PDIP / SO-8
Materials
EME6300 / MP150 / MP190
Remarks:
Device Information
Process & Design Rule
HVDCMOS 4.0 µm
Transistor Count
168
Die Size
67 X 91 X 26 (mil)
Die Outline
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