HIP4081A

80V/2.5A Peak, High Frequency

Full Bridge FET Driver

Description

The HIP4081A is a high frequency, medium voltage Full
Bridge N-Channel FET driver IC, available in 20 lead plastic
SOIC and DIP packages. The HIP4081A can drive every
possible switch combination except those which would
cause a shoot-through condition. The HIP4081A can switch
at frequencies up to 1MHz and is well suited to driving Voice
Coil Motors, high-frequency Class D audio amplifiers, and
power supplies.

For example, the HIP4081A can drive medium voltage brush
motors, and two HIP4081As can be used to drive high per-
formance stepper motors, since the short minimum "on-time"
can provide fine micro-stepping capability.

Short propagation delays of approximately 55ns maximizes
control loop crossover frequencies and dead-times which
can be adjusted to near zero to minimize distortion, resulting
in rapid, precise control of the driven load.

A similar part, the HIP4080A, includes an on-chip input com-
parator to create a PWM signal from an external triangle
wave and to facilitate "hysteresis mode" switching.

The Application Note for the HIP4081A is the AN9405.

Ordering Information

PART

NUMBER

TEMP RANGE

(

PACKAGE

PKG. NO.

HIP4081AIP

-40 to 85

20 Ld PDIP

E20.3

HIP4081AIB

-40 to 85

20 Ld SOIC (W)

M20.3

Features

· Independently Drives 4 N-Channel FET in Half Bridge

or Full Bridge Configurations

· Bootstrap Supply Max Voltage to 95V

· Drives 1000pF Load at 1MHz in Free Air at 50

C with

Rise and Fall Times of Typically 10ns

· User-Programmable Dead Time

· On-Chip Charge-Pump and Bootstrap Upper Bias

Supplies

· DIS (Disable) Overrides Input Control

· Input Logic Thresholds Compatible with 5V to 15V

Logic Levels

· Very Low Power Consumption

· Undervoltage Protection

Applications

· Medium/Large Voice Coil Motors

· Full Bridge Power Supplies

· Class D Audio Power Amplifiers

· High Performance Motor Controls

· Noise Cancellation Systems

· Battery Powered Vehicles

· Peripherals

· U.P.S.

November 1996

Pinout

HIP4081A (PDIP, SOIC)

TOP VIEW

BHB

BHI

DIS

BLI

ALI

HDEL

AHI

LDEL

AHB

BHO

BLO

BLS

BHS

ALS

ALO

AHS

AHO

Application Block Diagram

80V

GND

LOAD

HIP4081A

GND

12V

AHI

ALI

BLI

BHI

BLO

BHS

BHO

ALO

AHS

AHO

File Number

3659.5

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

www.intersil.com or 407-727-9207

Intersil Corporation 1999

HIP4081A

Absolute Maximum Ratings

Thermal Information

Supply Voltage, V

and V

. . . . . . . . . . . . . . . . . . . . -0.3V to 16V

Logic I/O Voltages . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V

+0.3V

Voltage on AHS, BHS . . . . -6.0V (Transient) to 80V (25

C to 125

Voltage on AHS, BHS . . . -6.0V (Transient) to 70V (-55

C to 125

Voltage on ALS, BLS . . . . . . . -2.0V (Transient) to +2.0V (Transient)
Voltage on AHB, BHB . . . . . . . . . V

AHS, BHS

-0.3V to V

AHS, BHS

Voltage on ALO, BLO . . . . . . . . . . . . . V

ALS, BLS

-0.3V to V

+0.3V

Voltage on AHO, BHO . . . . . . . V

AHS, BHS

-0.3V to V

AHB, BHB

+0.3V

Input Current, HDEL and LDEL . . . . . . . . . . . . . . . . . . -5mA to 0mA
Phase Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/ns
NOTE: All Voltages relative to V

, unless otherwise specified.

Thermal Resistance (Typical, Note 1)

(

C/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage Temperature Range . . . . . . . . . . . . . . . . . . . -65

C to 150

Operating Max. Junction Temperature . . . . . . . . . . . . . . . . . . 125

Lead Temperature (Soldering 10s)) . . . . . . . . . . . . . . . . . . . . 300

(For SOIC - Lead Tips Only

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

is measured with the component mounted on an evaluation PC board in free air.

Operating Conditions

Supply Voltage, V

and V

. . . . . . . . . . . . . . . . . . . +9.5V to +15V

Voltage on ALS, BLS . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +1.0V
Voltage on AHB, BHB . . . . . . . . . . V

AHS, BHS

+5V to V

AHS, BHS

+15V

Input Current, HDEL and LDEL. . . . . . . . . . . . . . . . -500

A to -50

Operating Ambient Temperature Range . . . . . . . . . . . -40

C to 85

Electrical Specifications

= V

AHB

= V

BHB

= 12V, V

= V

ALS

= V

BLS

= V

AHS

= V

BHS

= 0V, R

HDEL

= R

LDEL

= 100K and

= 25

C, Unless Otherwise Specified

PARAMETER

SYMBOL

TEST CONDITIONS

= 25

= -40

TO 125

UNITS

MIN

TYP

MAX

MIN

MAX

SUPPLY CURRENTS AND CHARGE PUMPS

Quiescent Current

All inputs = 0V

8.5

10.5

14.5

7.5

14.5

Operating Current

DDO

Outputs switching f = 500kHz

9.5

12.5

15.5

8.5

15.5

Quiescent Current

All Inputs = 0V, I

ALO

= I

BLO

= 0

0.1

Operating Current

CCO

f = 500kHz, No Load

1.25

2.0

0.8

AHB, BHB Quiescent Current -
Qpump Output Current

AHB

, I

BHB

All Inputs = 0V, I

AHO

= I

BHO

= 0

= V

AHB

= V

BHB

= 10V

-50

-30

-11

-60

-10

AHB, BHB Operating Current

AHBO

, I

BHBO

f = 500kHz, No Load

0.6

1.2

1.5

0.5

1.9

AHS, BHS, AHB, BHB Leakage
Current

HLK

BHS

= V

AHS

= 80V,

AHB

= V

BHB

= 93V

0.02

1.0

AHB-AHS, BHB-BHS Qpump
Output Voltage

AHB

-V

AHS

BHB

-V

BHS

AHB

= I

AHB

= 0, No Load

11.5

12.6

14.0

10.5

14.5

INPUT PINS: ALI, BLI, AHI, BHI, AND DIS

Low Level Input Voltage

Full Operating Conditions

1.0

0.8

High Level Input Voltage

Full Operating Conditions

2.5

2.7

Input Voltage Hysteresis

Low Level Input Current

= 0V, Full Operating Conditions

-130

-100

-75

-135

-65

High Level Input Current

= 5V, Full Operating Conditions

-1

-10

+10

TURN-ON DELAY PINS: LDEL AND HDEL

LDEL, HDEL Voltage

HDEL

, V

LDEL

HDEL

= I

LDEL

= -100

4.9

5.1

5.3

4.8

5.4

GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, AND BHO

Low Level Output Voltage

OUT

= 100mA

0.7

0.85

1.0

0.5

1.1

High Level Output Voltage

-V

OUT

= -100mA

0.8

0.95

1.1

0.5

1.2

Peak Pullup Current

OUT

= 0V

1.7

2.6

3.8

1.4

4.1

Peak Pulldown Current

OUT

= 12V

1.7

2.4

3.3

1.3

3.6

HIP4081A

Undervoltage, Rising Threshold

UV+

8.1

8.8

9.4

8.0

9.5

Undervoltage, Falling Threshold

UV-

7.6

8.3

8.9

7.5

9.0

Undervoltage, Hysteresis

HYS

0.25

0.4

0.65

0.2

0.7

Switching Specifications

= V

AHB

= V

BHB

= 12V, V

= V

ALS

= V

BLS

= V

AHS

= V

BHS

= 0V, R

HDEL

= R

LDEL

= 10K,

= 1000pF.

PARAMETER

SYMBOL

TEST CONDITIONS

= 25

= -40

TO 125

UNITS

MIN

TYP

MAX

MIN

MAX

Lower Turn-off Propagation Delay
(ALI-ALO, BLI-BLO)

LPHL

Upper Turn-off Propagation Delay
(AHI-AHO, BHI-BHO)

HPHL

Lower Turn-on Propagation Delay
(ALI-ALO, BLI-BLO)

LPLH

HDEL

= R

LDEL

= 10K

Upper Turn-on Propagation Delay
(AHI-AHO, BHI-BHO)

HPLH

HDEL

= R

LDEL

= 10K

110

Rise Time

Fall Time

Turn-on Input Pulse Width

PWIN-ON

HDEL

= R

LDEL

= 10K

Turn-off Input Pulse Width

PWIN-OFF

HDEL

= R

LDEL

= 10K

Turn-on Output Pulse Width

PWOUT-ON

HDEL

= R

LDEL

= 10K

Turn-off Output Pulse Width

PWOUT-OFF

HDEL

= R

LDEL

= 10K

Disable Turn-off Propagation Delay
(DIS - Lower Outputs)

DISLOW

Disable Turn-off Propagation Delay
(DIS - Upper Outputs)

DISHIGH

105

Disable to Lower Turn-on Propagation Delay
(DIS - ALO and BLO)

DLPLH

Refresh Pulse Width (ALO and BLO)

REF-PW

240

410

550

200

600

Disable to Upper Enable (DIS - AHO and BHO)

UEN

450

620

690

TRUTH TABLE

INPUT

OUTPUT

ALI, BLI

AHI, BHI

U/V

DIS

ALO, BLO

AHO, BHO

NOTE:

X signifies that input can be either a "1" or "0".

Electrical Specifications

= V

AHB

= V

BHB

= 12V, V

= V

ALS

= V

BLS

= V

AHS

= V

BHS

= 0V, R

HDEL

= R

LDEL

= 100K and

= 25

C, Unless Otherwise Specified (Continued)

PARAMETER

SYMBOL

TEST CONDITIONS

= 25

= -40

TO 125

UNITS

MIN

TYP

MAX

MIN

MAX

HIP4081A

Pin Descriptions

PIN

NUMBER

SYMBOL

DESCRIPTION

BHB

B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of boot-
strap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30

A out of this

pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.

BHI

B High-side Input. Logic level input that controls BHO driver (Pin 20). BLI (Pin 5) high level input overrides BHI
high level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides BHI
high level input. The pin can be driven by signal levels of 0V to 15V (no greater than V

). An internal 100

pull-up to V

will hold BHI high, so no connection is required if high-side and low-side outputs are to be con-

trolled by the low-side input.

DIS

DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs.
When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of
0V to 15V (no greater than V

). An internal 100

A pull-up to V

will hold DIS high if this pin is not driven.

Chip negative supply, generally will be ground.

BLI

B Low-side Input. Logic level input that controls BLO driver (Pin 18). If BHI (Pin 2) is driven high or not connected
externally then BLI controls both BLO and BHO drivers, with dead time set by delay currents at HDEL and LDEL
(Pin 8 and 9). DIS (Pin 3) high level input overrides BLI high level input. The pin can be driven by signal levels
of 0V to 15V (no greater than V

). An internal 100

A pull-up to V

will hold BLI high if this pin is not driven.

ALI

A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected
externally then ALI controls both ALO and AHO drivers, with dead time set by delay currents at HDEL and LDEL
(Pin 8 and 9). DIS (Pin 3) high level input overrides ALI high level input. The pin can be driven by signal levels
of 0V to 15V (no greater than V

). An internal 100

A pull-up to V

will hold ALI high if this pin is not driven.

AHI

A High-side Input. Logic level input that controls AHO driver (Pin 11). ALI (Pin 6) high level input overrides AHI
high level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides AHI
high level input. The pin can be driven by signal levels of 0V to 15V (no greater than V

). An internal 100

pull-up to V

will hold AHI high, so no connection is required if high-side and low-side outputs are to be con-

trolled by the low-side input.

HDEL

High-side turn-on DELay. Connect resistor from this pin to V

to set timing current that defines the turn-on de-

lay of both high-side drivers. The low-side drivers turn-off with no adjustable delay, so the HDEL resistor guar-
antees no shoot-through by delaying the turn-on of the high-side drivers. HDEL reference voltage is
approximately 5.1V.

LDEL

Low-side turn-on DELay. Connect resistor from this pin to V

to set timing current that defines the turn-on delay

of both low-side drivers. The high-side drivers turn-off with no adjustable delay, so the LDEL resistor guarantees
no shoot-through by delaying the turn-on of the low-side drivers. LDEL reference voltage is approximately 5.1V.

AHB

A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of boot-
strap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30

A out of this

pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.

AHO

A High-side Output. Connect to gate of A High-side power MOSFET.

AHS

A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of
bootstrap capacitor to this pin.

ALO

A Low-side Output. Connect to gate of A Low-side power MOSFET.

ALS

A Low-side Source connection. Connect to source of A Low-side power MOSFET.

Positive supply to gate drivers. Must be same potential as V

(Pin 16). Connect to anodes of two bootstrap

diodes.

Positive supply to lower gate drivers. Must be same potential as V

(Pin 15). De-couple this pin to V

(Pin 4).

BLS

B Low-side Source connection. Connect to source of B Low-side power MOSFET.

BLO

B Low-side Output. Connect to gate of B Low-side power MOSFET.

BHS

B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of
bootstrap capacitor to this pin.

BHO

B High-side Output. Connect to gate of B High-side power MOSFET.

Part Number HIP4081A