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Part Number BTS436L2

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BTS436L2
Semiconductor Group
Page 1
of 12
2003-Oct-01
Smart High-Side Power Switch
One Channel: 38m
Status Feedback
Product Summary Package
On-state Resistance
R
ON
38m
Operating Voltage
V
bb(on)
4.75...41V
Nominal load current
I
L(NOM)
9.8A
Current limitation
I
L(SCr)
40A
General Description
·
N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and
diagnostic feedback, monolithically integrated in Smart SIPMOS
technology.
·
Providing embedded protective functions
Applications
·
µC compatible high-side power switch with diagnostic feedback for 5V, 12V and 24V grounded loads
·
All types of resistive, inductive and capacitve loads
·
Most suitable for loads with high inrush currents, so as lamps
·
Replaces electromechanical relays, fuses and discrete circuits
Basic Functions
·
Very low standby current
·
CMOS compatible input
·
Fast demagnetization of inductive loads
·
Stable behaviour at undervoltage
·
Wide operating voltage range
·
Logic ground independent from load ground
Protection Functions
·
Short circuit protection
·
Overload protection
·
Current
limitation
·
Thermal
shutdown
·
Overvoltage protection (including load dump) with external
resistor
·
Reverse battery protection with external resistor
·
Loss of ground and loss of V
bb
protection
·
Electrostatic discharge protection (ESD)
Diagnostic Function
·
Diagnostic feedback with open drain output
·
Open load detection in ON-state
·
Feedback of thermal shutdown in ON-state
TO 220-5-11 TO-263-5-2 TO-220-5-12



Standard SMD Straight
Block Diagram
Vbb
Logic
with
protection
functions
IN
ST
GND
Load
PROFET
OUT
BTS436L2
Semiconductor Group
Page 2
2003-Oct-01
Functional diagram


















Pin Definitions and Functions
Pin
Symbol
Function
1
GND
Logic ground
2 IN
Input, activates the power switch in
case of logical high signal
3 Vbb
Positive power supply voltage
The tab is shorted to pin 3
4 ST
Diagnostic feedback, low on failure
5 OUT
Output to the load
Tab Vbb
Positive power supply voltage
The tab is shorted to pin 3




Pin configuration
(top view)
Tab = V
BB
1 2 (3) 4 5
GND IN ST OUT
OUT
GND
overvoltage
protection



logic
internal
voltage supply

ESD
temperature
sensor
clamp for
inductive load
gate
control
+
charge
pump
current limit
Open load
detection
ST
VBB
LOAD
IN
PROFET
BTS436L2
Semiconductor Group
Page 3
2003-Oct-01
Maximum Ratings
at T
j
= 25 °C unless otherwise specified
Parameter Symbol
Values
Unit
Supply voltage
(overvoltage protection see page 4)
V
bb
43
V
Supply voltage for full short circuit protection
T
j Start
=-40 ...+150°C
V
bb
24
V
Load dump protection
1)
V
LoadDump
= V
A
+ V
s
, V
A
= 13.5 V
R
I
2)
= 2
, R
L
= 4.0
, t
d
= 200 ms, IN= low or high
V
Load dump
3
60
V
Load current
(Current limit, see page 5)
I
L
self-limited
A
Operating temperature range
Storage temperature range
T
j
T
stg
-40 ...+150
-55 ...+150
°C
Power dissipation (DC), T
C
25 °C
P
tot
75
W
Maximal switchable inductance, single pulse
Vbb = 12V, Tj,start = 150°C, TC = 150°C const.
(See diagram on page 8) IL(ISO) = 9.8 A, RL = 0
, E
4
)
AS
=0.33J:
Z
L
5.0
mH
Electrostatic discharge capability (ESD)
IN:
(Human Body Model)
ST:
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and
ESD assn. std. S5.1-1993; R=1.5k
; C=100pF
V
ESD
1.0
4.0
8.0
kV
Input voltage (DC)
V
IN
-10 ... +16
V
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagrams page 7
I
IN
I
ST
±
2.0
±
5.0
mA
Thermal Characteristics
Parameter and Conditions Symbol
Values
Unit
min typ max
Thermal resistance
chip - case:
junction - ambient (free air):
device on pcb
5
):
R
thJC
R
thJA
--
--
--
--
--
33
1.75
75
--
K/W
1
)
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150
resistor for the GND connection is recommended).
2
)
R
I
= internal resistance of the load dump test pulse generator
3
)
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
4
)
E
AS
is the maximum inductive switch-off energy
5
)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70
µ
m thick) copper area for Vbb
connection. PCB is vertical without blown air.
BTS436L2
Semiconductor Group
Page 4
2003-Oct-01
Electrical Characteristics
Parameter and Conditions Symbol
Values
Unit
at T
j
=-40...+150°C, V
bb
= 12 V unless otherwise specified
min typ max

Load Switching Capabilities and Characteristics
On-state resistance (pin 3 to 5)
IL = 2 A; V
BB
7V
T
j
=25 °C:
T
j
=150 °C:
see diagram, page 9

R
ON
--
35
64
38
72
m
Nominal load current, (pin 3 to 5)
ISO 10483-1, 6.7:V
ON
=0.5V, T
C
=85°C
I
L(ISO)
8.8
9.8 --
A
Output current (pin
5
) while GND disconnected or
GND pulled up
6
)
, V
bb
=30 V, V
IN
= 0,
see diagram page 7
I
L(GNDhigh)
-- -- 2
mA
Turn-on time
IN
to 90% V
OUT
:
Turn-off time
IN
to 10% V
OUT
:
R
L
= 12
,
t
on
t
off
50
50
100
120
200
250
µ
s
Slew rate on
10 to 30% V
OUT
,
R
L
= 12
,
dV /dt
on
0.1 -- 1 V/
µ
s
Slew rate off
70 to 40% V
OUT
, R
L
= 12
,
-dV/dt
off
0.1 -- 1 V/
µ
s
Operating Parameters
Operating voltage
T
j
=-40
T
j
=+25...+150°C:
V
bb(on)
4.75 --
--
41
43
V
Overvoltage protection
7
)
T
j
=-40°C:
I
bb
=40 mA
T
j
=25...+150°C:
V
bb(AZ)
41
43
--
47
--
52
V
Standby current (pin 3)
8)
T
j
=-40...+25°C
:
V
IN
=0;
see diagram on page 9
T
j
= 150°C:
I
bb(off)
--
--
5
--
8
25
µ
A
Off-State output current (included in I
bb(off)
)
V
IN
=0
I
L(off)
-- 1 10
µ
A
Operating current
9
)
, V
IN
=5 V
I
GND
-- 0.8 1.4
mA
6
)
not subject to production test, specified by design
7
)
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150
resistor for the GND connection is recommended. See also V
ON(CL)
in table of protection functions and
circuit diagram page 7.
8
)
Measured with load
9
)
Add I
ST
, if I
ST
> 0, add I
IN
, if V
IN
>5.5 V
BTS436L2
Semiconductor Group
Page 5
2003-Oct-01
Parameter and Conditions Symbol
Values
Unit
at T
j
=-40...+150°C, V
bb
= 12 V unless otherwise specified
min typ max
Protection Functions
10)
Current limit (pin 3 to 5)
I
L(lim)
(see timing diagrams on page 11)
T
j
=-40°C:
T
j
=25°C:
T
j
=+150°C:
46
39
30
58
51
38
68
58
46
A
Repetitive short circuit shutdown current limit
I
L(SCr)
T
j
= T
jt
(see timing diagrams, page 11)
--
40
--
A
Thermal shutdown time
11)
T
j,start
= 25°C:
(see timing diagrams on page 11)
t
off(SC)
--
1.9
--
ms
Output clamp (inductive load switch off)
at V
OUT
= V
bb
- V
ON(CL)
I
L
= 40 mA:
V
ON(CL)
41
43
47 52
V
Thermal overload trip temperature
T
jt
150 -- --
°C
Thermal hysteresis
T
jt
-- 10 --
K
Reverse battery (pin 3 to 1)
12)
-V
bb
--
--
32
V
Reverse battery voltage drop
(V
out
> V
bb
)
13 )
I
L
= -2 A
T
j
=150 °C:
-V
ON(rev)
--
600 --
mV
Diagnostic Characteristics
Open load detection current
(on-condition)
I
L (OL)
100 --
900
mA
Input and Status Feedback
14
)
Input resistance
see circuit page 7
R
I
2.5
3.5 6
k
Input turn-on threshold voltage
V
IN(T+)
1.7 -- 3.2
V
Input turn-off threshold voltage
V
IN(T-)
1.5 -- --
V
Input threshold hysteresis
V
IN(T)
-- 0.5
--
V
Off state input current (pin 2), V
IN
= 0.4 V
I
IN(off)
1
--
50
µ
A
On state input current (pin 2), V
IN
= 5 V
I
IN(on)
20
50
90
µ
A
Delay time for status with open load
after switch off
(see timing diagrams on page 11)
t
d(ST OL4)
100 520 900
µ
s
Status output (open drain)
Zener limit voltage
I
ST
= +1.6 mA:
ST low voltage
I
ST
= +1.6 mA:
V
ST(high)
V
ST(low)
5.4
--
6.1
--
--
0.4
V
10
)
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are
not designed for continuous repetitive operation.
11
)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70
µ
m thick) copper area for Vbb
connection. PCB is vertical without blown air.
12
)
Requires
150
resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 3 and circuit page 7).
13
)
not subject to production test, specified by design
14
)
If a ground resistor R
GND
is used, add the voltage drop across this resistor.
BTS436L2
Semiconductor Group
Page 6
2003-Oct-01
Truth Table
Input
Output
Status
level
level
BTS 436L2
Normal
operation
L
H
L
H
H
H
Open load
L
H
Z
H
H
L
Overtem-
perature
L
H
L
L
H
L

L = "Low" Level
X = don't care
Z = high impedance, potential depends on external circuit
H = "High" Level
Status signal after the time delay shown in the diagrams (see fig 5. page 11)
BTS436L2
Semiconductor Group
Page 7
2003-Oct-01
Terms
PROFET
V
IN
ST
OUT
GND
bb
VST
V
IN
I ST
I IN
V
bb
Ibb
I L
VOUT
IGND
VON
1
2
4
3
5
R
GND

Input circuit (ESD protection)
IN
GND
I
R
ESD-ZD
I
I
I
The use of ESD zener diodes as voltage clamp at DC
conditions is not recommended
Status output
ST
GND
ESD-
ZD
+5V
R
ST(ON)
ESD-Zener diode: 6.1
V typ., max 5.0 mA; R
ST(ON)
< 375
at 1.6 mA. The use of ESD zener diodes as voltage clamp at
DC conditions is not recommended.
Inductive and overvoltage output clamp
+ Vbb
OUT
GND
PROFET
VZ
V
ON
V
ON
clamped to 47 V typ.
Overvolt. and reverse batt. protection
+ Vbb
IN
ST
ST
R
GND
GND
R
Signal GND
Logic
PROFET
VZ2
I
R
VZ1
Load GND
Load
R
OUT
ST
R
+ 5V
V
Z1
= 6.1 V typ., V
Z2
= 47 V typ., R
GND
= 150
,
R
ST
= 15 k
, R
I
= 3.5 k
typ.
In case of reverse battery the load current has to be
limited by the load. Temperature protection is not
active
Open-load detection
in on-state
Open load, if V
ON
< R
ON
·
I
L(OL)
; IN high
Open load
detection
Logic
unit
+ Vbb
OUT
ON
V
ON
GND disconnect
PROFET
V
IN
ST
OUT
GND
bb
V
bb
1
2
4
3
5
V
IN VST
V
GND
Any kind of load. In case of Input=high is V
OUT
V
IN
- V
IN(T+)
.
Due to V
GND
>0, no V
ST
= low signal available.
BTS436L2
Semiconductor Group
Page 8
2003-Oct-01
GND disconnect with GND pull up
PROFET
V
IN
ST
OUT
GND
bb
V
bb
1
2
4
3
5
V
GND
V
IN
V
ST
Any kind of load. If V
GND >
V
IN
- V
IN(T+)
device stays off
Due to V
GND
>0, no V
ST
= low signal available.
V
bb
disconnect with energized inductive
load
PROFET
V
IN
ST
OUT
GND
bb
V
bb
1
2
4
3
5
high
For inductive load currents up to the limits defined by ZL
(max. ratings and diagram on page 8) each switch is
protected against loss of Vbb.
Consider at your PCB layout that in the case of Vbb dis-
connection with energized inductive load all the load current
flows through the GND connection.
Inductive Load switch-off energy
dissipation
PROFET
V
IN
ST
OUT
GND
bb
=
E
E
E
EAS
bb
L
R
ELoad
L
RL
{
Z L
Energy stored in load inductance:
E
L
=
1/2
·
L
·
I
2
L
While demagnetizing load inductance, the energy
dissipated in PROFET is
E
AS
= E
bb
+ E
L
- E
R
=
V
ON(CL)
·
i
L
(t) dt,
with an approximate solution for R
L
>
0
:
E
AS
=
I
L
·
L
2
·
R
L
·
(
V
bb
+
|V
OUT(CL)
|)
·
ln
(1+
I
L
·
R
L
|V
OUT(CL)
| )
Maximum allowable load inductance for
a single switch off
L = f (I
L
); T
j,start
=
150°C,T
C
=
150°C const.,
V
bb
=
12
V, R
L
=
0
Z
L
[mH]
1
10
100
1000
0
2
4
6
10
12
14
16
18
0.1
IL [A]
BTS436L2
Semiconductor Group
Page 9
2003-Oct-01
Typ. on-state resistance
R
ON
= f (Vbb,Tj ); I
L
=
2
A, IN
= high
R
ON
[m
]
80
70
60
50
40
30
20
10
3 5 7 9
30
40
Tj = 150°C
25°C
-40°C
V
bb
[V]
Typ. standby current
I
bb(off)
= f (T
j
); V
bb
= 9...34 V, IN1,2
= low

I
bb(off)
[
µ
A]
0
5
10
15
20
25
30
35
40
45
-50
0
50
100
150
200
T
j
[°C]
BTS436L2
Semiconductor Group
Page 10
2003-Oct-01
Timing diagrams
Figure 1a: V
bb
turn on:
OUT
V
V bb
t
ST open drain
IN
proper turn on under all conditions
Figure 2a: Switching a resistive load,
turn-on/off time and slew rate definition:
IN
t
V
OUT
I
L
t
t
on
off
90%
dV/dton
dV/dtoff
10%


Figure 2b:
Switching a lamp,
IN
ST
OUT
L
t
V
I
The initial peak current should be limited by the lamp and not by the
current limit of the device.

Figure 2c:
Switching an inductive load
IN
ST
L
t
V
I
OUT
I
L(OL)
*) if the time constant of load is too large, open-load-status may
occur
BTS436L2
Semiconductor Group
Page 11
2003-Oct-01
Figure 3a: Short circuit
shut down by overtemperature, reset by cooling
other channel: normal operation
t
I
ST
IN
L
L(SCr)
I
I
L(lim)
toff(SC)
Heating up of the chip may require several milliseconds, depending
on external conditions

Figure 4a:
Overtemperature:
Reset if T
j
<T
jt
IN
ST
OUT
J
t
V
T
Figure 5a: Open load: detection in ON-state, open
load occurs in on-state
IN
ST
OUT
L
t
V
I
open
normal
normal
t
d(ST OL)
t
d(ST OL)
t
d(ST OL)
= 10
µ
s typ.
Figure 5b: Open load: turn on/off to open load
IN
ST
L
t
I
t
d(STOL4)
BTS436L2
Semiconductor Group
Page 12
2003-Oct-01
Package and Ordering Code
All dimensions in mm
Standard (=staggered): P-TO220-5-11
Sales code
BTS436L2
Ordering code:
Q67060-S6111-A2
SMD: P-TO263-5-2
(tape&reel)
Sales code
BTS436L2 G
Ordering code:
T&R
Q67060-S6111-A3
Straight: P-TO220-5-12
Sales code
BTS436L2 S
Ordering code:
Q67060-S6111-A4
Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 München
© Infineon Technologies AG 2001
All Rights Reserved.
Attention please!
The information herein is given to describe certain
components and shall not be considered as a guarantee of
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not
limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and
conditions and prices please contact your nearest Infineon
Technologies Office in Germany or our Infineon
Technologies Representatives worldwide (see address list).
Warnings
Due to technical requirements components may contain
dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies
Office.
Infineon Technologies Components may only be used in life-
support devices or systems with the express written
approval of Infineon Technologies, if a failure of such
components can reasonably be expected to cause the
failure of that life-support device or system, or to affect the
safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to
assume that the health of the user or other persons may be
endangered.
A
8° max.
B
A
0.25
M
0.1
Typical
9.8
±0.15
±0.2
10
8.5
1)
8
1)
(15)
±0.2
9.25
±0.3
1
0...0.15
5x0.8
±0.1
±0.1
1.27
4.4
B
0.5
±0.1
±0.3
2.7
4.7
±0.5
0.05
1)
0.1
All metal surfaces tin plated, except area of cut.
±0.3
1.3
2.4
4x1.7
A
A
0.25
M
Typical
9.8
±0.15
2.8
1)
15.65
±0.3
13.4
0...0.15
1.7
0.8
±0.1
±0.1
1.27
4.4
9.25
±0.2
0.05
1)
All metal surfaces tin plated, except area of cut.
C
±0.2
17
±0.3
8.5
1)
10
±0.2
3.7
-0.15
C
2.4
0.5
±0.1
±0.3
8.6
10.2
±0.3
±0.4
3.9
±0.4
8.4
3.7
±0.3
A
B
A
0.25
M
Typical
9.8
±0.15
2.8
1)
15.65
±0.3
13.4
0...0.15
1.7
0.8
±0.1
±0.1
1.27
4.4
B
9.25
±0.2
0.05
1)
All metal surfaces tin plated, except area of cut.
C
±0.2
17
±0.3
8.5
1)
10
±0.2
3.7
-0.15
C
2.4
0.5
±0.1
13
±0.5
±0.5
11
6x