06_62lv256.p65

IS62LV256

Integrated Circuit Solution Inc.

SR006-0B

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors

FEATURES

Access time: 45, 70, 100 ns

Low active power: 70 mW

Low standby power

-- 45 µW CMOS standby

Fully static operation: no clock or refresh

required

TTL compatible inputs and outputs

Single 3.3V power supply

DESCRIPTION

The

ICSI

IS62LV256 is a very high-speed, low power,

32,768-word by 8-bit static RAM. It is fabricated using

ICSI

high-performance CMOS double-metal technology.

When

CE is HIGH (deselected), the device assumes a standby

m o d e a t w h i c h t h e p o w e r d i s s i p a t i o n i s r e d u c e d t o

10 µW (typical) with CMOS input levels.

Easy memory expansion is provided by using an active LOW

Chip Enable (

CE) input and an active LOW Output Enable (OE)

input. The active LOW Write Enable (

WE) controls both writing

and reading of the memory.

The IS62LV256 is pin compatible with other 32K x 8 SRAMs

in 300mil DIP and SOJ, 330mil SOP, and 8*13.4mm TSOP-1

packages.

IS62LV256

32K x 8 LOW VOLTAGE STATIC RAM

FUNCTIONAL BLOCK DIAGRAM

A0-A14

256 X 1024

MEMORY ARRAY

DECODER

COLUMN I/O

CONTROL

CIRCUIT

GND

VCC

I/O

DATA

CIRCUIT

I/O0-I/O7

IS62LV256

Integrated Circuit Solution Inc.

SR006-0B

PIN CONFIGURATION

28-Pin DIP, SOJ and SOP

PIN CONFIGURATION

8x13.4mm TSOP-1

PIN DESCRIPTIONS

A0-A14

Address Inputs

Chip Enable Input

Output Enable Input

Write Enable Input

I/O0-I/O7

Input/Output

Vcc

Power

GND

Ground

TRUTH TABLE

Mode

I/O Operation

Vcc Current

Not Selected

High-Z

, I

(Power-down)

Output Disabled

High-Z

, I

Read

OUT

, I

Write

, I

22
23
24
25
26
27
28
1
2
3
4
5
6
7

21
20
19
18
17
16
15
14
13
12
11
10

9
8

A11

A9
A8

A13

VCC

A14
A12

A7
A6
A5
A4
A3

A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol

Parameter

Value

Unit

TERM

Terminal Voltage with Respect to GND

0.5 to +4.6

BIAS

Temperature Under Bias

55 to +125

°C

STG

Storage Temperature

65 to +150

°C

Power Dissipation

0.5

OUT

DC Output Current (LOW)

Notes:
1.

Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation of the

device at these or any other conditions above those indicated in the operational sections of

this specification is not implied. Exposure to absolute maximum rating conditions for

extended periods may affect reliability.

A14

A12

I/O0

I/O1

I/O2

GND

VCC

A13

A11

A10

I/O7

I/O6

I/O5

I/O4

I/O3

IS62LV256

Integrated Circuit Solution Inc.

SR006-0B

OPERATING RANGE

Range

Ambient Temperature

Commercial

0°C to +70°C

3.3V ± 5%

Industrial

40°C to +85°C

3.3V ± 5%

POWER SUPPLY CHARACTERISTICS

(1)

(Over Operating Range)

-45 ns

-70 ns

-100 ns

Symbol Parameter

Test Conditions

Min. Max.

Unit

Vcc Operating

= Max.,

CE = V

Com.

Supply Current

OUT

= 0 mA, f = 0

Ind.

Vcc Dynamic Operating

= Max.,

CE = V

Com.

Supply Current

OUT

= 0 mA, f = f

MAX

Ind.

TTL Standby Current

= Max.,

Com.

(TTL Inputs)

= V

or V

Ind.

CE > V

, f = 0

CMOS Standby

= Max.,

Com.

µA

Current (CMOS Inputs)

CE > V

0.2V,

Ind.

200

> V

0.2V, or

< 0.2V, f = 0

Notes:
1.

At f = f

MAX

, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

DC ELECTRICAL CHARACTERISTICS

(Over Operating Range)

Symbol Parameter

Test Conditions

Min.

Max.

Unit

Output HIGH Voltage

= Min., I

= 1.0 mA

2.4

Output LOW Voltage

= Min., I

= 2.1 mA

0.4

Input HIGH Voltage

2.2

+ 0.3

Input LOW Voltage

(1)

0.3

0.8

Input Leakage

GND < V

< V

Com.

µA

Ind.

Output Leakage

GND < V

OUT

< V

, Outputs Disabled

Com.

µA

Ind.

Notes:
1.

= 3.0V for pulse width less than 10 ns.

Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.

CAPACITANCE

(1,2)

Symbol

Parameter

Conditions

Max.

Unit

Input Capacitance

= 0V

OUT

Output Capacitance

OUT

= 0V

Notes:
1.

Tested initially and after any design or process changes that may affect these parameters.

Test conditions: T

= 25°C, f = 1 MHz, Vcc =3.3V.

IS62LV256

Integrated Circuit Solution Inc.

SR006-0B

READ CYCLE SWITCHING CHARACTERISTICS

(1)

(Over Operating Range)

-45 ns

-70 ns

-100 ns

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Read Cycle Time

100

Address Access Time

100

OHA

Output Hold Time

ACE

CE Access Time

100

DOE

OE Access Time

LZOE

(2)

OE to Low-Z Output

HZOE

(2)

OE to High-Z Output

LZCE

(2)

CE to Low-Z Output

HZCE

(2)

CE to High-Z Output

(3)

CE to Power-Up

(3)

CE to Power-Down

Notes:
1.

Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V

and output loading specified in Figure 1a.

Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

Not 100% tested.

AC TEST LOADS

AC TEST CONDITIONS

Parameter

Unit

Input Pulse Level

0V to 3.0V

Input Rise and Fall Times

5 ns

Input and Output Timing

1.5V

and Reference Levels

Output Load

See Figures 1a and 1b

1213

100 pF

Including

jig and

scope

1378

OUTPUT

3.3V

Figure 1a.

Figure 1b.

1213

5 pF

Including

jig and

scope

1378

OUTPUT

3.3V

IS62LV256

Integrated Circuit Solution Inc.

SR006-0B

DATA VALID

OHA

OUT

ADDRESS

50%

OHA

DOE

LZOE

ACE

LZCE

HZOE

HIGH-Z

DATA VALID

HZCE

ISB

ADDRESS

OUT

SUPPLY

CURRENT

ICC

HIGH-Z

READ CYCLE NO. 2

(1,3)

AC WAVEFORMS

READ CYCLE NO. 1

(1,2)

Notes:
1.

WE is HIGH for a Read Cycle.

The device is continuously selected.

OE, CE = V

Address is valid prior to or coincident with

CE LOW transitions.

Part Number IS62LV256