Äîêóìåíòàöèÿ è îïèñàíèÿ www.docs.chipfind.ru

HT82M99EE/HT82M99AE

USB Mouse Encoder 8-Bit MCU

Rev. 1.00

February 8, 2006

General Description

The USB MCU HT82M99EE/HT82M99AE are suitable
for USB mouse and USB joystick devices. It consists of
a Holtek high performance 8-bit MCU core for control

unit, built-in USB SIE, 2K

´14 program memory and 96

bytes data RAM.

The mask version HT82M99AE is fully pin and function-
ally compatible with the OTP version HT82M99EE de-
vice.

There are two dice in the HT82M99EE/HT82M99AE
package: one is the HT82M99EE/HT82M99AE MCU,

the other is a 128

´8 bits EEPROM used for data mem-

ory purpose. The two dice are wire-bonded to form
HT82M99EE/HT82M99AE.

Features

Flexible total solution for applications that combine
PS/2 and low-speed USB interface, such as mice,
joysticks, and many others

USB Specification Compliance

Conforms to USB specification V1.1

Conforms to USB HID specification V1.1

Supports 1 Low-speed USB control endpoint and 1
interrupt endpoint

Each endpoint has 8

´8 bytes FIFO

Integrated USB transceiver

3.3V regulator output

External 6MHz or 12MHz ceramic resonator or crys-
tal

8-bit RISC microcontroller, with 2K

´14 program

memory (000H~7FFH)

96 bytes RAM (20H~7FH)

128

´8 data EEPROM

6MHz/12MHz internal CPU clock

4-level stacks

Two 7-bit indirect addressing registers

One 16-bit programmable timer counter with over-
flow interrupt (shared with PA7, vector 0CH)

One USB interrupt input (vector 04H)

HALT function and wake-up feature reduce power
consumption

PA0~PA7, PB4 and PB7 support wake-up function

Internal Power-On reset (POR)

Watchdog Timer (WDT)

12 I/O ports

20-pin DIP/SOP package

Technical Document

Tools Information

FAQs

Application Note

Block Diagram

Pin Assignment

HT82M99EE/HT82M99AE

Rev. 1.00

February 8, 2006

O S C 2

O S C 1

R E S

V D D

M U X

T M R C

T M R L

T M R H

V S S

P r o g r a m

R O M

P r o g r a m

C o u n t e r

I n t e r r u p t

C i r c u i t

S T A C K

I N T C

D a t a

M e m o r y

I n s t r u c t i o n

R e g i s t e r

I n s t r u c t i o n

D e c o d e r

S T A T U S

A L U

S h i f t e r

T i m i n g

G e n e r a t o r

A C C

M P

S Y S C L K / 4

W D T S

W D T

W D T O S C

W D T P r e s c a l e r

E N / D I S

P B C

P O R T B

P B

P A C

P O R T A

P A

S Y S

/ 4

P A 7 / T M R

U S B 1 . 1

P S 2

B P

U S B D + / C L K U S B D - / D A T A V 3 3 O

P A 0 ~ P A 6

P A 7 / T M R

P B 2 ~ P B 3

P B 4 / S D A

P B 7 / S C L

2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1

1
2
3
4
5
6
7
8
9
1 0

H T 8 2 M 9 9 E E / H T 8 2 M 9 9 A E

2 0 D I P - A / S O P - A

V S S

V 3 3 O

U S B D + / C L K

U S B D - / D A T A

R E S

P A 0
P A 1
P B 2
P B 3

P B 4 / S D A

O S C I
O S C O
V D D
P A 7 / T M R
P A 6
P A 5
P A 4
P A 3
P A 2
P B 7 / S C L

Pin Description

Pin Name

I/O

ROM Code

Option

Description

PA0~PA6
PA7/TMR

I/O

Pull-low

Pull-high

Wake-up

CMOS/NMOS/PMOS

Bidirectional 8-bit input/output port. Each bit can be configured as a
wake-up input by ROM code option. The input or output mode is con-
trolled by PAC (PA control register).
Pull-high resistor options: PA0~PA7
Pull-low resistor options: PA0~PA3
CMOS/NMOS/PMOS options: PA0~PA7
Falling edge wake-up options: PA0~PA1, PA4~PA7
Rising and falling edge wake-up options: PA2~PA3
PA7 is wire-bonded with TMR

PB2~PB3

I/O

Pull-high

Pull-low

PB4/SDA,
PB7/SCL

I/O

Pull-high

Wake-up

Bidirectional 8-bit input/output port. Software instructions determine the
CMOS output or Schmitt trigger input with pull-high resistor (determined
by pull-high options).
The PB can be used as analog input of the analog to digital converter
(determined by options).
Falling edge wake-up options: PB4, PB7
PB4 is wire-bonded with SDA pad of the Data EEPROM
PB7 is wire-bonded with SCL pad of the Data EEPROM

VSS

Negative power supply, ground

RES

Schmitt trigger reset input. Active low.

VDD

Positive power supply

V33O

3.3V regulator output

USBD+/CLK

I/O

USBD+ or PS2 CLK I/O line
USB or PS2 function is controlled by software control register

USBD-/DATA

I/O

USBD- or PS2 DATA I/O line
USB or PS2 function is controlled by software control register

OSCI
OSCO

OSCI, OSCO are connected to a 6MHz or 12MHz crystal/resonator (de-
termined by software instructions) for the internal system clock.

Absolute Maximum Ratings

Supply Voltage ...........................V

-0.3V to V

+6.0V

Storage Temperature ............................

-50°C to 125°C

Input Voltage..............................V

-0.3V to V

+0.3V

Operating Temperature...............................0

°C to 70°C

Note: These are stress ratings only. Stresses exceeding the range specified under

²Absolute Maximum Ratings² may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.

HT82M99EE/HT82M99AE

Rev. 1.00

February 8, 2006

D.C. Characteristics

Ta=25

°C

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Conditions

Operating Voltage

5.5

Operating Current (6MHz Crystal)

No load, f

SYS

=6MHz

STB

Standby Current

No load, system HALT

300

500

IL1

Input Low Voltage for I/O Ports

0.8

IH1

Input High Voltage for I/O Ports

IL2

Input Low Voltage (RES)

0.4V

IH2

Input High Voltage (RES)

0.9V

Output Sink Current for Other Ports
PA0~PA7, PB2~PB4, PB7

=0.4V

Output Port Source Current

=3.4V

-2.5

-4

Pull-down Resistance for PA0~PA3, PB2
and PB3

PH1

Pull-high Resistance for CLK and DATA

4.7

PH2

Pull-high Resistance for PA0~PA7,
PB2~PB4, PB7

LVR

Low Voltage Reset

2.4

2.7

A.C. Characteristics

Ta=25

°C

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Conditions

SYS

System Clock (Crystal OSC)

MHz

RCSYS

RC Clock with 8-bit Prescaler Register

kHz

WDT

Watchdog Time-out Period (System Clock)

¾ Without WDT prescaler 1024

RCSYS

USBD+, USBD- Rising & falling Time

300

SST

System Start-up Timer Period

¾ Wake-up from HALT

1024

SYS

OSC

Crystal Setup

Note: Power-on period=t

WDT

SST

OSC

WDT Time-out in normal mode=1/f

RCSYS

´256´WDTS+t

WDT

WDT Time-out in HALT mode=1/f

RCSYS

´256´WDTS+t

SST

OSC

HT82M99EE/HT82M99AE

Rev. 1.00

February 8, 2006

EEPROM A.C. Characteristics

Ta=25

°C

Symbol

Parameter

Remark

Standard Mode*

=5V

±10%

Unit

Min.

Max.

Min.

Max.

Clock Frequency

100

400

kHz

HIGH

Clock High Time

4000

600

LOW

Clock Low Time

4700

1200

SDA and SCL Rise Time

Note

1000

300

SDA and SCL Fall Time

Note

300

HD:STA

START Condition Hold Time

After this period the first
clock pulse is generated

4000

600

SU:STA

START Condition Setup Time

Only relevant for repeated
START condition

4000

600

HD:DAT

Data Input Hold Time

SU:DAT

Data Input Setup Time

200

100

SU:STO

STOP Condition Setup Time

4000

600

Output Valid from Clock

3500

900

BUF

Bus Free Time

Time in which the bus must
be free before a new trans-
mission can start

4700

1200

Input Filter Time Constant
(SDA and SCL Pins)

Noise suppression time

100

Write Cycle Time

Note: These parameters are periodically sampled but not 100% tested

* The standard mode means V

=2.2V to 5.5V

For relative timing, refer to timing diagrams

HT82M99EE/HT82M99AE

Rev. 1.00

February 8, 2006

Part Number HT82M99AE

Document Outline