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Part Number S7170-0909

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Hamamatsu developed Multi Pin-Phase (MPP) mode back-thinned FFT- CCDs S7170-0909, S7171-0909 specifically designed for low-light-level
detection in scientific applications. S7170-0909, S7171-0909 have sensitivity from the UV to near-IR as well as having low dark current and wide
dynamic range. Stability of the spectral response curve is also achieved for high precision measurements.
Either one-stage or two-stage thermoelectric cooler is built into the package (S7171-0909, S7172-0909). At room temperature operation, the
device can be cooled down to -10 °C by one-stage cooler and -30 °C by two-stage cooler, respectively. In addition since both the CCD chip and
the thermoelectric cooler are hermetically sealed, no dry air is required, thus allowing easy handling.
Features
l 512 × 512 pixel format
l Greater than 90 % quantum efficiency
at peak sensitivity wavelength
l Wide spectrum range
l Low readout noise
l Wide dynamic range
l MPP operation
l Non-cooled types: S7170-0909
One-stage TE-cooled types: S7171-0909
Applications
l Scientific measuring instrument
l Semiconductor inspection
l UV imaging
l Bio-photon observation
I M A G E S E N S O R
CCD area image sensor
512 × 512 pixels, Back-thinned FFT-CCD
S7170-0909, S7171-0909
I General ratings
Parameter
S7170-0909
S7171-0909
Pixel size
24 (H) × 24 (V) µm
Number of active pixels
512 (H) × 512 (V)
Vertical clock phase
2 phase
Horizontal clock phase
2 phase
Output circuit
One-stage MOSFET source follower
Package
24 pin ceramic DIP (refer to dimensional outlines)
Built-in cooler
-
One-stage
Window
Sapphire glass *
1
*1: Window-less is available upon request.
I Selection guide
Type No.
Cooling
Number of total pixels
Number of active
pixels
Active area
[mm (H) × mm (V)]
S7170-0909
Non-cooled
532 ´ 520
512 ´ 512
12.288 ´ 12.288
S7171-0909
One-stage
TE-cooled
532 ´ 520
512 ´ 512
12.288 ´ 12.288
Note) Two-stage TE-cooled type (S7172-0909) is also available.
1
CCD area image sensor
S7170-0909, S7171-0909
I Absolute maximum ratings (Ta=25 °C)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Operating temperature
Topr
-50
-
+30
°C
Storage temperature
Tstg
-50
-
+70
°C
OD voltage
V
OD
-0.5
-
+25
V
RD voltage
V
RD
-0.5
-
+18
V
ISV voltage
V
ISV
-0.5
-
+18
V
ISH voltage
V
ISH
-0.5
-
+18
V
IGV voltage
V
IG1V
, V
IG2V
-10
-
+15
V
IGH voltage
V
IG1H
, V
IG2H
-10
-
+15
V
SG voltage
V
SG
-10
-
+15
V
OG voltage
V
OG
-10
-
+15
V
RG voltage
V
RG
-10
-
+15
V
TG voltage
V
TG
-10
-
+15
V
Vertical clock voltage
V
P1V
, V
P2V
-10
-
+15
V
Horizontal clock voltage
V
P1H
, V
P2H
-10
-
+15
V
I Operating conditions (MPP mode, Ta=25 °C)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Output transistor drain voltage
V
OD
18
20
22
V
Reset drain voltage
V
RD
11.5
12
12.5
V
Output gate voltage
V
OG
1
3
5
V
Substrate voltage
V
SS
-
0
-
V
Test point (vertical input source)
V
ISV
-
V
RD
-
V
Test point (horizontal input source)
V
ISH
-
V
RD
-
V
Test point (vertical input gate)
V
IG1V
, V
IG2V
-8
0
-
V
Test point (horizontal input gate)
V
IG1H
, V
IG2H
-8
0
-
V
High
V
P1VH
, V
P2VH
4
6
8
Vertical shift register
clock voltage
Low
V
P1VL
, V
P2VL
-9
-8
-7
V
High
V
P1HH
, V
P2HH
4
6
8
Horizontal shift register
clock voltage
Low
V
P1HL
, V
P2HL
-9
-8
-7
V
High
V
SGH
4
6
8
Summing gate voltage
Low
V
SGL
-9
-8
-7
V
High
V
RGH
4
6
8
Reset gate voltage
Low
V
RGL
-9
-8
-7
V
High
V
TGH
4
6
8
Transfer gate voltage
Low
V
TGL
-9
-8
-7
V
I Electrical characteristics (Ta=25 °C)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Signal output frequency
fc
-
-
1
MHz
Vertical shift register capacitance
C
P1V
, C
P2V
-
6,400
-
pF
Horizontal shift register capacitance
C
P1H
, C
P2H
-
120
-
pF
Summing gate capacitance
C
SG
-
7
-
pF
Reset gate capacitance
C
RG
-
7
-
pF
Transfer gate capacitance
C
TG
-
150
-
pF
Charge transfer efficiency *
2
CTE
0.99995
0.99999
-
-
DC output level *
3
Vout
12
15
18
V
Output impedance *
3
Zo
-
3
-
kW
Power consumption *
3
*
4
P
-
15
-
mW
*2: Charge transfer efficiency per pixel, measured at half of the full well capacity.
*3: The values depend on the load resistance. (Typical, V
OD
=20 V, Load resistance=22 kW)
*4: Power consumption of the on-chip amplifier.
2
CCD area image sensor
S7170-0909, S7171-0909
3
*9: Spectral response with sapphire window is decreased by
the transmittance
I Spectral response (without window)
*9
I Spectral transmittance characteristic of window material
KMPDB0058EA
QUANTUM EFFICIENCY (%)
WAVELENGTH (nm)
(Typ. Ta=25 °C)
0
200
400
600
800
1000
1200
10
20
30
40
50
60
70
80
90
100
FRONT-SIDED
FRONT-SIDED
(UV COAT)
BACK-THINNED
0
10
100
200
WAVELENGTH (nm)
TRANSMITTANCE (%)
300
400
500
600
700
800
900 1000
20
30
40
50
60
70
80
90
100
(Typ. Ta=25 °C)
KMPDB0102EA
G Window material
Type No.
Window material
S7170-0909
S7171-0909
S7172-0909
(two-stage TE-
cooled type)
Sapphire glass *
10
(option: window-less)
*10: Hermetic sealing
I Electrical and optical characteristics (Ta=25 °C, unless otherwise noted)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Saturation output voltage
Vsat
-
Fw × Sv
-
V
Vertical
150,000
300,000
-
Full well
capacity
Horizontal
Fw
300,000
600,000
-
e
-
CCD node sensitivity
Sv
1.8
2.2
-
µV/e
-
25 °C
-
4,000
12,000
Dark current *
5
(MPP mode)
0 °C
DS
-
200
600
e
-
/pixel/s
Readout noise *
6
Nr
-
8
16
e
-
rms
Line binning
18,750
75,000
-
-
Dynamic range *
7
Area scanning
DR
9,375
37,500
-
-
Photo response non-uniformity *
8
PRNU
-
±3
±10
%
Spectral response range
l
-
200 to 1100
-
nm
*5: Dark current nearly doubles for every 5 to7 °C increase in temperature.
*6: Operating frequency is 150 kHz.
*7: Dynamic Range (DR) = Full well/Readout noise
*8: Measured at half of the full well capacity.
Photo Response Non-Uniformity (PRNU) [%] =
Signal
peak)
to
(peak
noise
pattern
Fixed
× 100
CCD area image sensor
S7170-0909, S7171-0909
I Device structure
23
22
21
20
14
15
24
1
2
12
11
8
9
3
4
5
512 SIGNAL OUT
4 BLANK
4 BLANK
THINNING
THINNING
1 2 3 4
2
3
4
5
V
H
8 BEVEL
4 BEVEL
512 SIGNAL OUT
13
10
V=512
H=512
5
4 BEVEL
4 BEVEL
I Dark current vs. temperature
KMPDC0075EA
-50
-40
-30
-20
0
-10
10
20
30
TEMPERATURE (°C)
0.1
1
10
100
1000
10000
DARK CURRENT (e
-
/pixel/s)
(Typ.)
KMPDB0037EB
4
CCD area image sensor
S7170-0909, S7171-0909
INTEGRATION PERIOD
(Shutter must be open)
P1V
RG
OS
P2V, TG
P1H
P2H, SG
READOUT PERIOD (Shutter must be closed)
ENLARGED VIEW
4..519 520
512 + 8 (BEVEL)
Tpwv
Tovr
Tpwr
D1
D2
D3
D4
D18
D19
D20
D5..D12, S1..S512, D13..D17
P2V, TG
P1H
P2H, SG
RG
OS
Tpwh, Tpws
1
2
3
KMPDC0119EA
I Timing chart
Parameter
Symbol
Remark
Min.
Typ.
Max.
Unit
Pulse width
Tpwv
6
-
-
µs
P1V, P2V, TG
Rise and fall time
Tprv, Tpfv
*
11
200
-
-
ns
Pulse width
Tpwh
500
-
-
ns
Rise and fall time
Tprh, pfh
10
-
-
ns
P1H, P2H
Duty ratio
-
*
11
-
50
-
%
Pulse width
Tpws
500
-
-
ns
Rise and fall time
Tprs, Tpfs
10
-
-
ns
SG
Duty ratio
-
-
-
50
-
%
Pulse width
Tpwr
100
-
-
ns
RG
Rise and fall time
Tprr, Tpfr
-
5
-
-
ns
TG P1H
Overlap time
Tovr
-
3
-
-
µs
*11: Symmetrical pulses should be overlapped at 50 % of maximum amplitude.
5
Area scanning 1 (low dark current mode)
CCD area image sensor
S7170-0909, S7171-0909
KMPDC0120EA
Parameter
Symbol
Remark
Min.
Typ.
Max.
Unit
Pulse width
Tpwv
6
-
-
µs
P1V, P2V, TG
Rise and fall time
Tprv, Tpfv
*
12
200
-
-
ns
Pulse width
Tpwh
500
-
-
ns
Rise and fall time
Tprh, Tpfh
10
-
-
ns
P1H, P2H
Duty ratio
-
*
12
-
50
-
%
Pulse width
Tpws
500
-
-
ns
Rise and fall time
Tprs, Tpfs
10
-
-
ns
SG
Duty ratio
-
-
-
50
-
%
Pulse width
Tpwr
100
-
-
ns
RG
Rise and fall time
Tprr, Tpfr
-
5
-
-
ns
TG - P1H
Overlap time
Tovr
-
3
-
-
µs
*12: Symmetrical pulses should be overlapped at 50 % of maximum amplitude.
INTEGRATION PERIOD
(Shutter must be open)
P1V
RG
OS
P2V, TG
P1H
P2H, SG
READOUT PERIOD (Shutter must be closed)
ENLARGED VIEW
4..519 520
512 + 8 (BEVEL)
Tpwv
Tovr
Tpwr
D1
D2
D3
D4
D18
D19
D20
D5..D12, S1..S512, D13..D17
P2V, TG
P1H
P2H, SG
RG
OS
Tpwh, Tpws
1
2
3
6
Area scanning 2 (large full well mode)
CCD area image sensor
S7170-0909, S7171-0909
WINDOW 14.8
12.8
34.0
2.54
22.9
22.4
12.288
ACTIVE AREA
12.288
4.0
4.8
2.4
3.4
PHOTOSENSITIVE SURFACE
1st PIN INDICATION PAD
3.0
(24 ×) 0.5
WINDOW 14.8
12.8
34.0
50.0
2.54
22.9
19.0
4.0
42.0
22.4
12.288
6.9
1.0
7.7
6.3
4.8
ACTIVE AREA
12.288
PHOTOSENSITIVE SURFACE
1st PIN INDICATION PAD
3.0
TE-COOLER
(24 ×) 0.5
I Dimensional outlines (unit: mm)
KMPDA0084EA
KMPDA0085EB
S7170-0909
S7171-0909
7
CCD area image sensor
S7170-0909, S7171-0909
I Pin connections
S7170-0909
S7171-0909
Pin
No.
Symbol
Function
Symbol
Function
Remark
(standard operation)
1
RD
Reset drain
RD
Reset drain
+12 V
2
OS
Output transistor source
OS
Output transistor source
R
L
=10 k to 100 kW
3
OD
Output transistor drain
OD
Output transistor drain
+20 V
4
OG
Output gate
OG
Output gate
+3 V
5
SG
Summing gate
SG
Summing gate
Same pulse as P2H
6
-
-
7
-
-
8
P2H
CCD horizontal register clock-2
P2H
CCD horizontal register clock-2
9
P1H
CCD horizontal register clock-1
P1H
CCD horizontal register clock-1
10
IG2H
Test point (horizontal input gate-2)
IG2H
Test point (horizontal input gate-2)
0 V
11
IG1H
Test point (horizontal input gate-1)
IG1H
Test point (horizontal input gate-1)
0 V
12
ISH
Test point (horizontal input source)
ISH
Test point (horizontal input source)
Connect to RD
13
TG *
13
Transfer gate
TG *
13
Transfer gate
Same pulse as P2V
14
P2V
CCD vertical register clock-2
P2V
CCD vertical register clock-2
15
P1V
CCD vertical register clock-1
P1V
CCD vertical register clock-1
16
-
Th1
Thermistor
17
-
Th2
Thermistor
18
-
P-
TE-cooler-
19
-
P+
TE-cooler+
20
SS
Substrate (GND)
SS
Substrate (GND)
GND
21
ISV
Test point (vertical input source)
ISV
Test point (vertical input source)
Connect to RD
22
IG2V
Test point (vertical input gate-2)
IG2V
Test point (vertical input gate-2)
0 V
23
IG1V
Test point (vertical input gate-1)
IG1V
Test point (vertical input gate-1)
0 V
24
RG
Reset gate
RG
Reset gate
*13: Isolation gate between vertical register and horizontal register. In standard operation, TG should be applied the same pulse
as P2V.
I Specifications of built-in TE-cooler (S7171-0909)
Parameter
Symbol
Condition
Typ.
Unit
Internal resistance
Rint
Ta=25 °C
2.1
W
Maximum current *
"
Imax Tc *
#
=Th *
$
=25 °C
2.0
A
Maximum voltage
Vmax Tc *
#
=Th *
$
=25 °C
4.2
V
Maximum heat absorption *
%
Qmax
4.5
W
Maximum temperature of heat radiating side
-
70
°C
*14: Maximum current Imax:
If the current greater than this value flows into the thermoelectric cooler, the heat absorption begins to decrease due to the
Joule heat. It should be noted that this value is not the damage threshold value. To protect the thermoelectric cooler and
maintain stable operation, the supply current should be less than 60 % of this maximum current.
*15: Temperature of the cooling side of thermoelectric cooler.
*16: Temperature of the heat radiating side of thermoelectric cooler.
*17: Maximum heat absorption Qmax.
This is a theoretical heat absorption level that offsets the temperature difference in the thermoelectric cooler when the
maximum current is supplied to the unit.
VOLTAGE vs. CURRENT
CCD TEMPERATURE vs. CURRENT
0
1
2
3
V
O
L
T
A
GE (V)
CCD TEMPERA
TURE
(
°
C)
4
6
5
-30
2.0
1.5
1.0
CURRENT (A)
0.5
0
-20
-10
0
10
20
30
(Typ. Ta=25 °C)
KMPDB0180EA
8
HAMAMATSU PHOTONICS K.K., Solid State Division
1126-1 Ichino-cho, Hamamatsu City, 435-8558 Japan, Telephone: (81) 053-434-3311, Fax: (81) 053-434-5184, http://www.hamamatsu.com
U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218
Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 08152-3750, Fax: (49) 08152-2658
France: Hamamatsu Photonics France S.A.R.L.: 8, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10
United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777
North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01
Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1/E, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741
Information furnished by HAMAMATSU is believed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions.
Specifications are subject to change without notice. No patent rights are granted to any of the circuits described herein. ©2003 Hamamatsu Photonics K.K.
CCD area image sensor
S7170-0909, S7171-0909
I Precaution for use (Electrostatic countermeasures)
G Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist band with
an earth ring, in order to prevent electrostatic damage due to electrical charges from friction.
G Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge.
G Provide ground lines or ground connection with the work-floor, work-desk and work-bench to allow static electricity to
discharge.
G Ground the tools used to handle these sensors, such as tweezers and soldering irons.
It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the
amount of damage that occurs.
I Specifications of built-in temperature sensor (S7171-0909)
A chip thermistor is built in the same package with a CCD chip, and the CCD chip temperature can be monitored with it. A relation
between the thermistor resistance and absolute temperature is expressed by the following equation.
R1 = R2 × expB (1 / T1 - 1 / T2)
where R1 is the resistance at absolute temperature T1 (K)
R2 is the resistance at absolute temperature T2 (K)
B is so-called the B constant (K)
The characteristics of the thermistor used are as follows.
R (298K) = 10 kW
B (298K / 323K) = 3450 K
(Typ. Ta=25 °C)
10 k
220
240
260
TEMPERATURE (K)
RESIST
ANCE
280
300
100 k
1 M
Cat. No. KMPD1028E05
Feb. 2003 DN
KMPDB0111EA
9
I Element cooling/heating temperature incline rate
Element cooling/heating temperature incline rate should be set at less than 5 K/min.