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Part Number MB15E07SR

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DS04-21378-2E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP
Single Serial Input
PLL Frequency Synthesizer
On-chip 2.5 GHz Prescaler
MB15E07SR
DESCRIPTION
The Fujitsu MB15E07SR is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 2.5 GHz
prescaler. The 2.5 GHz prescaler has a dual modulus division ratio of 32/33 or 64/65 enabling pulse swallowing
operation.
The supply voltage range is between 2.7 V and 5.0 V. A refined charge pump supplies well-balanced output
currents of 1.0 mA and 4.0 mA. The charge pump current is selectable by serial data.
The phase noise of MB15E07SR was drastically improved comparing wuth the former single PLL, MB15E07SL.
The data format of serial data and the pin assignments except for
P,
R and OSCout pins are same as the former
one, so it is easy to replace the former one.
MB15E07SR is ideally suited for the base station of GSM (Global System for Mobile Communications) and PCS.
FEATURES
· High frequency operation: 2.5 GHz Max
· Low power supply voltage: V
CC
= 2.7 V to 5.0 V
· Ultra Low power supply current:I
CC
= 8.0 mA Typ (V
CC
= Vp = 3.75 V, Ta = +25
°
C, in locking state)
· Direct power saving function:Power supply current in power saving mode
Typ 0.1
µ
A (V
CC
= Vp = 3.75 V, Ta = +25
°
C)
· Dual modulus prescaler: 32/33 or 64/65
(Continued)
PACKAGES
16-pin plastic TSSOP
(FPT-16P-M07)
16-pad plastic BCC
(LCC-16P-M06)
MB15E07SR
2
(Continued)
· Serial input 14-bit programmable reference divider: R = 3 to 16,383
· Serial input programmable divider consisting of:
- Binary 7-bit swallow counter: 0 to 127
- Binary 11-bit programmable counter: 3 to 2,047
· Software selectable charge pump current
· On-chip phase control for phase comparator
· Built-in digital locking detector circuit to detect PLL locking and unlocking
· Operating temperature: Ta = ­40
°
C to +85
°
C
PIN ASSIGNMENTS
OSC
IN
N.C.
V
P
V
CC
D
O
GND
Xfin
fin
N.C.
N.C.
LD/fout
N.C.
PS
LE
Data
Clock
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
N.C.
V
P
V
CC
D
O
GND
Xfin
N.C.
LD/fout
N.C.
PS
LE
Data
OSC
IN
N.C.
fin Clock
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
(FPT-16P-M07)
(LCC-16P-M06)
16-pin TSSOP
16-pad BCC
Top view
Top view
MB15E07SR
3
PIN DESCRIPTIONS
Pin no.
Pin
name
I/O
Descriptions
TSSOP
BCC
1
16
OSC
IN
I
Programmable reference divider input. Connection to a TCXO.
2
1
N.C.
­
No connection.
3
2
V
P
­
Power supply voltage input for the charge pump.
4
3
V
CC
­
Power supply voltage input.
5
4
D
O
O
Charge pump output.
Phase of the charge pump can be selected via programming of the FC bit.
6
5
GND
­
Ground.
7
6
Xfin
I
Prescaler complementary input, which should be grounded via a capacitor.
8
7
fin
I
Prescaler input.
Connection to an external VCO should be done via AC coupling.
9
8
Clock
I
Clock input for the 19-bit shift register.
Data is shifted into the shift register on the rising edge of the clock.
(Open is prohibited.)
10
9
Data
I
Serial data input using binary code.
The last bit of the data is a control bit. (Open is prohibited.)
11
10
LE
I
Load enable signal input. (Open is prohibited.)
When LE is set high, the data in the shift register is transferred to a latch
according to the control bit in the serial data.
12
11
PS
I
Power saving mode control. This pin must be set at "L" at Power-ON.
(Open is prohibited.)
PS = "H"; Normal mode
PS = "L"; Power saving mode
13
12
N.C.
­
No connection.
14
13
LD/fout
O
Lock detect signal output (LD)/phase comparator monitoring output (fout).
The output signal is selected via programming of the LDS bit.
LDS = "H"; outputs fout (fr/fp monitoring output)
LDS = "L"; outputs LD ("H" at locking, "L" at unlocking.)
15
14
N.C.
­
No connection.
16
15
N.C.
­
No connection.
MB15E07SR
4
BLOCK DIAGRAM
fin
PS
OSC
IN
D
O
Clock
LE
LD
/
fout
Xfin
GND
SW
V
P
C
N
T
fp
(16)
(11)
(10)
(6)
(9)
(8)
(7)
(5)
(13)
(2)
(4)
14
3
5
6
8
9
10
7
11
12
1
(3)
4
Data
V
CC
7-bit latch
11-bit latch
SW
FC
LDS CS
Reference
oscillator circuit
Binary 14-bit
reference couter
14-bit latch
4-bit latch
Phase
comparator
Lock
detector
19-bit shift register
Intermittent
mode control
(power save)
1-bit
control
latch
Binary 7-bit
swallow
counter
Binary 11-bit
programmable
counter
Prescaler
32/33
64/65
fr
Charge
pump
LD/fr/fp
selector
O : TSSOP
( ) : BCC
MB15E07SR
5
ABSOLUTE MAXIMUM RATINGS
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
RECOMMENDED OPERATING CONDITIONS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device's electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
Parameter
Symbol
Condition
Rating
Unit
Remark
Min
Max
Power supply voltage
V
CC
­
­0.5
5.5
V
V
P
­
V
CC
6.0
V
Input voltage
V
I
­
­0.5
V
CC
+ 0.5
V
Output voltage
V
O
Except Do
GND
V
CC
V
V
O
Do
GND
V
P
V
Storage temperature
Tstg
­
­55
+125
°
C
Parameter
Symbol
Value
Unit
Remark
Min
Typ
Max
Power supply voltage
V
CC
2.7
3.75
5.0
V
V
P
V
CC
­
5.5
V
Input voltage
V
I
GND
­
V
CC
V
Operating temperature
Ta
­40
­
+85
°
C