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Part Number SI4467DY

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January 2001
2001 Fairchild Semiconductor International
Si4467DY Rev A
Si4467DY
P-Channel 1.8V Specified PowerTrench
MOSFET
General Description
This P-Channel 1.8V specified MOSFET is a rugged
gate version of Fairchild Semiconductor's advanced
PowerTrench process. It has been optimized for power
management applications with a wide range of gate
drive voltage (1.8V ­ 8V).
Applications
·
Power management
·
Load switch
·
Battery protection
Features
·
­13.5 A, ­20 V. R
DS(ON)
= 8.5 m
@ V
GS
= ­4.5 V
R
DS(ON)
= 10.5 m
@ V
GS
= ­2.5 V
R
DS(ON)
= 14 m
@ V
GS
= ­1.8 V
·
Fast switching speed
·
High performance trench technology for extremely
low R
DS(ON)
·
High current and power handling capability
S
D
S
S
SO-8
D
D
D
G
D
D
D
D
S
S
S
G
Pin 1
SO-8
4
3
2
1
5
6
7
8
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
Parameter
Ratings
Units
V
DSS
Drain-Source Voltage
­
20
V
V
GSS
Gate-Source Voltage
±
8
V
I
D
Drain Current ­ Continuous
(Note 1a)
­
13.5
A
­ Pulsed
­
50
Power Dissipation for Single Operation
(Note 1a)
2.5
(Note 1b)
1.5
P
D
(Note 1c)
1.2
W
T
J
, T
STG
Operating and Storage Junction Temperature Range
-55 to +175
°
C
Thermal Characteristics
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
50
°
C/W
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1c)
125
°
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
25
°
C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
4467
Si4467DY 13'' 12mm 2500 units
Si4467
DY
Si4467DY Rev A
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BV
DSS
Drain­Source Breakdown Voltage
V
GS
= 0 V, I
D
= ­250
µ
A
­20
V
BV
DSS
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= ­250
µ
A, Referenced to 25
°
C
­12
mV/
°
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= ­16 V,
V
GS
= 0 V
­1
µ
A
I
GSSF
Gate­Body Leakage, Forward
V
GS
= 8 V,
V
DS
= 0 V
100
nA
I
GSSR
Gate­Body Leakage, Reverse
V
GS
= ­8 V,
V
DS
= 0 V
­100
nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= ­250
µ
A
­0.4
­0.6
­1.5
V
V
GS(th)
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= ­250
µ
A, Referenced to 25
°
C
3
mV/
°
C
R
DS(on)
Static Drain­Source
On­Resistance
V
GS
= ­4.5 V,
I
D
= ­13.5 A
V
GS
= ­2.5 V,
I
D
= ­12 A
V
GS
= ­1.8 V,
I
D
= ­10.5 A
V
GS
=­4.5 V, I
D
=­13.5A, T
J
=125
°
C
6.7
8.0
9.8
9.0
8.5
10.5
14
13
m
I
D(on)
On­State Drain Current
V
GS
= ­4.5 V,
V
DS
= ­5 V
­50
A
g
FS
Forward Transconductance
V
DS
= ­5 V,
I
D
= ­13.5 A
70
S
Dynamic Characteristics
C
iss
Input Capacitance
8237
pF
C
oss
Output Capacitance
1497
pF
C
rss
Reverse Transfer Capacitance
V
DS
= ­10 V,
V
GS
= 0 V,
f = 1.0 MHz
750
pF
Switching Characteristics
(Note 2)
t
d(on)
Turn­On Delay Time
20
36
ns
t
r
Turn­On Rise Time
24
38
ns
t
d(off)
Turn­Off Delay Time
300
480
ns
t
f
Turn­Off Fall Time
V
DD
= ­10V,
I
D
= ­1 A,
V
GS
= ­4.5 V,
R
GEN
= 6
140
224
ns
Q
g
Total Gate Charge
86
120
nC
Q
gs
Gate­Source Charge
20
nC
Q
gd
Gate­Drain Charge
V
DS
= ­10 V,
I
D
= ­13.5 A,
V
GS
= ­4.5 V
11
nC
Drain­Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain­Source Diode Forward Current
­2.1
A
V
SD
Drain­Source Diode Forward
Voltage
V
GS
= 0 V,
I
S
= ­2.1 A
(Note 2)
­0.6
­1.2
V
Notes:
1.
R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
JC
is guaranteed by design while R
CA
is determined by the user's board design.
a) 50 °C/W when
mounted on a 1in
2
pad of 2 oz copper
b) 105 °C/W when
mounted on a .04 in
2
pad of 2 oz copper
c) 125 °C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300
µ
s, Duty Cycle < 2.0%
Si4467
DY
Si4467DY Rev A
Typical Characteristics
0
10
20
30
40
50
0
0.5
1
1.5
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRE
NT (
A
)
V
GS
= -4.5V
-2.5V
-2.0V
-1.8V
-1.5V
0.6
1
1.4
1.8
2.2
2.6
3
0
10
20
30
40
50
-I
D
, DRAIN CURRENT (A)
R
DS
(
O
N)
, NO
RMALIZE
D
DRAIN-
S
O
URCE
O
N
-
R
E
S
I
S
T
ANC
E
V
GS
= -1.5V
-4.5V
-2.0V
-2.5V
-1.8V
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
1.6
-50
-25
0
25
50
75
100
125
150
175
T
J
, JUNCTION TEMPERATURE (
o
C)
R
DS
(
O
N)
, NO
RMALIZE
D
DRAIN-
S
O
URCE
O
N
-
R
E
S
I
S
T
ANC
E
I
D
= -13.5A
V
GS
= -10V
0
0.005
0.01
0.015
0.02
0.025
0
1
2
3
4
5
-V
GS
, GATE TO SOURCE VOLTAGE (V)
R
DS
(
O
N)
, O
N
-
R
E
S
I
S
T
ANCE
(
O
HM)
I
D
= -6.3A
T
A
= 125
o
C
T
A
= 25
o
C
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
10
20
30
40
50
0
0.5
1
1.5
2
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRE
NT (
A
)
T
A
= 125
o
C
25
o
C
-55
o
C
V
DS
= -5.0V
0.0001
0.001
0.01
0.1
1
10
100
0
0.2
0.4
0.6
0.8
1
1.2
-V
SD
,
BODY DIODE FORWARD VOLTAGE (V)
-I
S
,
R
EVER
SE
DRAIN CURRE
NT (
A
)
V
GS
= 0V
T
A
= 125
o
C
25
o
C
-55
o
C
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
Si4467
DY
Si4467DY Rev A
Typical Characteristics
0
1
2
3
4
5
0
20
40
60
80
100
Q
g
, GATE CHARGE (nC)
-V
GS
, G
A
TE
-
S
O
URCE
V
O
LTAG
E
(
V
)
I
D
= -13.5A
V
DS
= -5V
-10V
-15V
0
2000
4000
6000
8000
10000
0
5
10
15
20
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAP
A
CITANCE
(
pF)
C
ISS
C
OSS
C
RSS
f = 1 MHz
V
GS
= 0 V
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.1
1
10
100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
-I
D
,
DRAI
N CURRE
NT (
A
)
DC
10s
1s
100ms
100
µ
s
R
DS(ON)
LIMIT
V
GS
= -4.5V
SINGLE PULSE
R
JA
= 125
o
C/W
T
A
= 25
o
C
10ms
1ms
0
10
20
30
40
50
0.001
0.01
0.1
1
10
100
t
1
, TIME (sec)
P(
p
k
)
,
PEA
K
T
R
A
N
S
I
E
N
T
POW
E
R
(
W
)
SINGLE PULSE
R
JA
= 125°C/W
T
A
= 25°C
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
r(t), NO
RM
ALIZED EFFECTIVE
T
RANSI
E
NT
T
H
ERM
A
L
RESI
ST
ANCE
R
JA
(t) = r(t) + R
JA
R
JA
= 125
o
C/W
T
J
- T
A
= P * R
JA
(t)
Duty Cycle, D = t
1
/ t
2
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
Si4467
DY
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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