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Part Number FCAS50SN60

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©2005 Fairchild Semiconductor Corporation
1
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
January 2005
FCAS50SN60
Smart Power Module for SRM
Features
· Very low thermal resistance due to using DBC
· 600V-50A single-phase asymmetric bridge IGBT converter
for SRM drive including control ICs for gate driving and pro-
tection
· Divided negative dc-link terminals for inverter current sensing
applications
· Single-grounded power supply due to built-in HVIC
· Switching frequency of 2.2~8kHz
· Isolation rating of 2500Vrms/min.
Applications
· AC 200V ~ 242V single-phase SRM drives for home
application vacuum cleaner.
General Description
FCAS50SN60 is an advanced smart power module for SRM
drive that Fairchild has newly developed and designed to pro-
vide very compact and high performance SRM motor drives
mainly targeting low-power inverter-driven SRM application
especially for a vacuum air cleaner. It combines optimized cir-
cuit protection and drive matched to low-loss IGBTs. System
reliability is further enhanced by the integrated under-voltage
lock-out and short-circuit protection. The high speed built-in
HVIC provides opto-coupler-less IGBT gate driving capability
that further reduce the overall size of the inverter system
design. In addition the incorporated HVIC facilitates the use of
single-supply drive topology enabling the FCAS50SN60 to be
driven by only one drive supply voltage without negative bias.
Each phase current of inverter can be monitored separately due
to the divided negative dc terminals.
Top View
26.8
mm
mm
Top View
44
Bottom View
Bottom View
Figure 1.
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Integrated Power Functions
· 600V-50A IGBT asymmetric converter for single-phase SRM drives (Please refer to Figure 3)
Integrated Drive, Protection and System Control Functions
· For high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting
Control circuit under-voltage (UV) protection
Note) Available bootstrap circuit example is given in Figures 10.
· For low-side IGBTs: Gate drive circuit, Short circuit protection (SC)
Control supply circuit under-voltage (UV) protection
· Fault signaling: Corresponding to a UV fault (Low-side supply)
· Input interface: 5V CMOS/LSTTL compatible, Schmitt trigger input
Pin Configuration
Figure 2.
Top View
Case Temperature (T
C
)
Detecting Point
DBC
DBC
(1) V
CC(L)
(2) COM
(3) NC
(4) NC
(5) IN
(L)
(6) V
FO
(15) V
B
(16) V
S
(17) G
(H)
(18) E
(H)
(19) R
(TH)
(20) V
(TH)
(7) C
FOD
(8) C
SC
(9) G
(L)
(10) E
(L)
(11) NC
(12) NC
(13) IN
(H)
(14) V
CC(H)
(21) N
B2
(22) NC
(23) N
B1
(27) P
(24) N
A
(25) B
(26) A
3
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Pin Descriptions
Pin Number
Pin Name
Pin Description
1
V
CC(L)
Low-side Common Bias Voltage for IC and IGBTs Driving
2
COM
Common Supply Ground
3
NC
Dummy Pin
4
NC
Dummy Pin
5
IN
(L)
Signal Input for Low-side IGBT
6
V
FO
Fault Output
7
C
FOD
Capacitor for Fault Output Duration Time Selection
8
C
SC
Capacitor (Low-pass Filter) for Short-Current Detection
9
G
(L)
Gate terminal of low-side IGBT
10
E
(L)
Emitter terminal of low-side IGBT
11
NC
Dummy Pin
12
NC
Dummy Pin
13
IN
(H)
Signal Input for High-side IGBT
14
V
CC(H)
High-side Bias Voltage
15
V
B
High-side Bias Voltage for Gate Driving
16
V
S
High-side Bias Voltage Ground for Gate Driving
17
G
(H)
Gate terminal of the High-side IGBT
18
E
(H)
Emitter terminal of the High-side IGBT
19
R
(TH)
Thermistor Series Resistor
20
V
(TH)
Thermistor Bias Voltage
21
N
B2
Negative DC­Link Input for B Leg (Should be shorted with N
B1
externally)
22
NC
Dummy Pin
23
N
B1
Negative DC­Link Input for B Leg (Should be shorted with N
B2
externally)
24
N
A
Negative DC­Link Input for A Leg
25
B
Output for B Leg
26
A
Output for A Leg
27
P
Positive DC­Link Input
4
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Internal Equivalent Circuit and Input/Output Pins
Note:
1. The low-side is composed of one IGBT and freewheeling diode and one control IC which has gate driving and protection functions.
2. The power side is composed of four dc-link input terminals and two output terminals.
3. The high-side is composed of one IGBT and freewheeling diode and one drive IC for high-side IGBT.
Figure 3.
COM(L)
VCC
IN(UL)
IN(VL)
IN(WL)
VFO
C(FOD)
C(SC)
OUT(WL)
OUT(VL)
OUT(UL)
N
B1
(23)
N
A
(24)
B (25)
A (26)
P (27)
(16) V
S
(15) V
B
(8) C
SC
(7) C
FOD
(6) V
FO
(5) IN
(L)
(4) NC
(3) NC
(2) COM
(1) V
CC(L)
VCC
VB
OUT
COM
VS
IN
(14) V
CC(H)
(13) IN
(H)
(11) NC
(9) G
(L)
(10) E
(L)
(17) G
(H)
(18) E
(H)
(12) NC
(19) R
(TH)
(20) V
(TH)
N
B2
(21)
NC (22)
5
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Absolute Maximum Ratings
(T
J
= 25°C, Unless Otherwise Specified)
Inverter Part
Note:
1. The maximum junction temperature rating of the power chips integrated within the module is 150
°C(@T
C
100°C). However, to insure safe operation, the average junction
temperature should be limited to T
J(ave)
125°C (@T
C
100°C)
Control Part
Total System
Thermal Resistance
Note:
2. For the measurement point of case temperature (T
C
), please refer to Figure 2.
Symbol
Parameter
Conditions
Rating
Units
V
PN(Surge)
Supply Voltage (Surge)
Applied between P- N
A
, N
B1
, N
B2
550
V
V
CES
Collector-emitter Voltage
600
V
± I
C
Each IGBT Collector Current
T
C
= 25°C
50
A
± I
CP
Each IGBT Collector Current (Peak)
T
C
= 25°C, Under 1ms Pulse Width
100
A
P
C
Collector Dissipation
T
C
= 25°C per One IGBT
110
W
T
J
Operating Junction Temperature
(Note 1)
-20 ~ 125
°C
Symbol
Parameter
Conditions
Rating
Units
V
CC
Control Supply Voltage
Applied between V
CC(H)
, V
CC(L)
- COM
20
V
V
BS
High-side Control Bias Voltage
Applied between V
B
- V
S
20
V
V
IN
Input Signal Voltage
Applied between IN
(H)
, IN
(L)
- COM
-0.3~5.5
V
V
FO
Fault Output Supply Voltage
Applied between V
FO
- COM
-0.3~V
CC
+0.3
V
I
FO
Fault Output Current
Sink Current at V
FO
Pin
5
mA
V
SC
Current Sensing Input Voltage
Applied between C
SC
- COM
-0.3~V
CC
+0.3
V
Symbol
Parameter
Conditions
Rating
Units
V
PN(PROT)
Self Protection Supply Voltage Limit
(Short Circuit Protection Capability)
V
CC
= V
BS
= 13.5 ~ 16.5V
T
J
= 125°C, Non-repetitive, less than 6
µs
400
V
T
C
Module Case Operation Temperature
-20 ~ 95
°C
T
STG
Storage Temperature
-40 ~ 125
°C
V
ISO
Isolation Voltage
60Hz, Sinusoidal, AC 1 minute, Connection
Pins to DBC
2500
V
rms
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
R
th(j-c)Q
Junction to Case Thermal
Resistance
Each IGBT under Operating Condition
-
-
0.90
°C/W
R
th(j-c)F
Each FWDi under Operating Condition
-
-
2.2
°C/W
6
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Electrical Characteristics
(T
J
= 25°C, Unless Otherwise Specified)
Inverter Part
Note:
3. t
ON
and t
OFF
include the propagation delay time of the internal drive IC. t
C(ON)
and t
C(OFF)
are the switching time of IGBT itself under the given gate driving condition internally.
For the detailed information, please see Figure 4.
Figure 4. Switching Time Definition
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
V
CE(SAT)
Collector-Emitter
Saturation Voltage
V
CC
= V
BS
= 15V
V
IN
= 5V
I
C
= 50A, T
J
= 25°C
-
1.6
2.3
V
V
FM
FWDi Forward Voltage
V
IN
= 0V
I
C
= 50A, T
J
= 25°C
-
2.1
3.0
V
HS
t
ON
Switching Times
V
PN
= 300V, V
CC
= V
BS
= 15V
I
C
= 50A
V
IN
= 0V
5V, Inductive Load
R
E(H)
= 10
(Note 3)
-
0.8
-
µs
t
C(ON)
-
0.6
-
µs
t
OFF
-
1.5
-
µs
t
C(OFF)
-
0.8
-
µs
t
rr
-
0.08
-
µs
LS
t
ON
V
PN
= 300V, V
CC
= V
BS
= 15V
I
C
= 50A
V
IN
= 0V
5V, Inductive Load
(Note 3)
-
1.1
-
µs
t
C(ON)
-
0.9
-
µs
t
OFF
-
1.5
-
µs
t
C(OFF)
-
0.8
-
µs
t
rr
-
0.05
-
µs
I
CES
Collector - Emitter
Leakage Current
V
CE
= V
CES
-
-
250
µA
V
C E
I
C
V
I N
t
O F F
t
C ( O F F )
V
IN ( O F F )
1 0 % V
C E
1 0 % I
C
V
C E
I
C
V
I N
t
O N
t
C ( O N )
V
IN ( O N )
1 0 % I
C
1 0 % V
C E
9 0 % I
C
1 0 0 % I
C
t
r r
7
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Electrical Characteristics
(T
J
= 25°C, Unless Otherwise Specified)
Control Part
Note:
4. Short-circuit current protection is functioning only at the low-sides.
5. The fault-out pulse width t
FOD
depends on the capacitance value of C
FOD
according to the following approximate equation : C
FOD
= 18.3 x 10
-6
x t
FOD
[F]
Recommended Operating Conditions
Symbol
Parameter
Conditions
Min.
Typ.
Max. Units
I
QCCL
Quiescent V
CC
Supply
Current
V
CC
= 15V
IN
(L)
= 0V
V
CC(L)
- COM
-
-
40
mA
I
QCCH
V
CC
= 15V
IN
(H)
= 0V
V
CC(H)
- COM
-
-
80
µA
I
QBS
Quiescent V
BS
Supply
Current
V
BS
= 15V
IN
(H)
= 0V
V
B
- V
S
-
-
100
µA
V
FOH
Fault Output Voltage
V
SC
= 0V, V
FO
Circuit: 4.7k
to 5V Pull-up
4.5
-
-
V
V
FOL
V
SC
= 1V, V
FO
Circuit: 4.7k
to 5V Pull-up
-
-
0.8
V
V
SC(ref)
Short Circuit Trip Level
V
CC
= 15V (Note 4)
0.45
0.5
0.55
V
UV
CCD
Supply Circuit Under-
Voltage Protection
Detection Level
Applied between
V
CC(L)
- COM
10.5
-
12.5
V
UV
CCR
Reset Level
11.0
-
13
V
UV
BSD
Detection Level
Applied between
V
B
- V
S
10.0
-
12.5
V
UV
BSR
Reset Level
10.5
-
13.0
V
t
FOD
Fault-out Pulse Width
C
FOD
= 33nF (Note 5)
1.4
1.8
2.0
ms
V
IH
ON Threshold Voltage
Logic`1' input voltage Applied between
IN
(H)
, IN
(L)
- COM
3.0
-
-
V
V
IL
OFF Threshold Voltage
Logic`0' input voltage
-
-
0.8
V
I
INH(ON)
Input Bias Current
IN
(H)
= 5V
Applied between
IN
(H)
, IN
(L)
- COM
0.9
-
2.2
mA
I
INL(ON)
IN
(L)
= 5V
0.9
-
2.4
mA
R
TH
Resistance of Thermistor
@ T
C
= 25°C (Note Fig. 10)
-
50
-
k
@ T
C
= 80°C (Note Fig. 10)
-
5.76
-
k
Symbol
Parameter
Conditions
Value
Units
Min.
Typ.
Max.
V
PN
Supply Voltage
Applied between P - N
A
, N
B1
, N
B2
-
300
450
V
V
CC
Control Supply Voltage
Applied between V
CC(H)
, V
CC(L)
- COM
13.5
15
16.5
V
V
BS
High-side Bias Voltage
Applied between V
B
- V
S
13.5
15
18.5
V
f
PWM
PWM Input Signal
T
C
100°C, T
J
125°C
-
3
-
kHz
V
IN(ON)
Input ON Voltage
Applied between IN
(H)
, IN
(L)
- COM
4 ~ 5.5
V
V
IN(OFF)
Input OFF Voltage
Applied between IN
(H)
, IN
(L)
- COM
0 ~ 0.65
V
8
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Mechanical Characteristics and Ratings
Figure 5. Flatness Measurement Position
Parameter
Conditions
Limits
Units
Min.
Typ.
Max.
Mounting Torque
Mounting Screw - M3
5.17
6.29
7.30
Kg·cm
0.51
0.62
0.72
N·m
Surface Flatness
Note Figure 5.
0
-
120
um
Weight
-
15.0
-
g
(+)
(+)
(+)
9
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Time Charts of Protective Function
a1 : Control supply voltage rises: After the voltage rises UV
CCR
, the circuits start to operate when next input is applied.
a2 : Normal operation: IGBT ON and carrying current.
a3 : Under voltage detection (UV
CCD
).
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts.
a6 : Under voltage reset (UV
CCR
).
a7 : Normal operation: IGBT ON and carrying current.
Fig. 6. Under-Voltage Protection (Low-side)
b1 : Control supply voltage rises: After the voltage reaches UV
BSR
, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under voltage detection (UV
BSD
).
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under voltage reset (UV
BSR
)
b6 : Normal operation: IGBT ON and carrying current
Fig. 7. Under-Voltage Protection (High-side)
Input Signal
Output Current
Fault Output Signal
Control
Supply Voltage
RESET
UV
CCR
Protection
Circuit State
SET
RESET
UV
CCD
a1
a3
a2
a4
a6
a5
a7
Input Signal
Output Current
Fault Output Signal
Control
Supply Voltage
RESET
UV
BSR
Protection
Circuit State
SET
RESET
UV
BSD
b1
b3
b2
b4
b6
b5
High-level (no fault output)
10
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
(with the external shunt resistance and CR connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short circuit current detection (SC trigger).
c3 : Hard IGBT gate interrupt.
c4 : IGBT turns OFF.
c5 : Fault output timer operation starts: The pulse width of the fault output signal is set by the external capacitor C
FO
.
c6 : Input "L" : IGBT OFF state.
c7 : Input "H": IGBT ON state, but during the active period of fault output the IGBT doesn't turn ON.
c8 : IGBT OFF state
Fig. 8. Short-Circuit Current Protection (Low-side Operation only)
Fig. 9. R-T Curve of the Built-in Thermistor
In te rn a l IG B T
G a te -E m itte r V o lta g e
In p u t S ig n a l
O u tp u t C u rre n t
S e n s in g V o lta g e
F a u lt O u tp u t S ig n a l
P 1
P 2
P 3
P 4
P 6
P 5
P 7
P 8
S C R e fe re n c e
V o lta g e (0 .5 V )
R C F ilte r D e la y
S C D e te c tio n
R-T Graph
0
20
40
60
80
100
120
20 30 40 50 60 70 80 90 100 110 120 130
Temperature [
°C]
Re
sistan
ce
[
k
]
11
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Note:
1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application's
printed circuit board. The input signal section integrates 3.3k
(typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal
voltage drop at input terminal.
2. The logic input is compatible with standard CMOS or LSTTL outputs.
Figure 10. Recommended CPU I/O Interface Circuit
Note:
It would be recommended that the bootstrap diode, D
BS
, has soft and fast recovery characteristics. R
BS
should be 2.5 times greater than R
E(H)
Figure 11. Recommended Bootstrap Operation Circuit and Parameters
CPU
COM
5V-Line
1nF
4.7k
V
FO
100
1nF
SRM Module
R
PF
=
C
PF
=
IN
(H)
IN
(L)
15V-Line
25
18uF
0.1uF
1000uF
0.1uF
SRM module
Vcc
IN
COM
VB
HO
VS
Vcc
IN
COM
OUT
Outputs
P
N
A
This Value depends on PWM Control Algorithm
D
BS
R
BS
V
SL
N
B
RE(H)=10
12
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FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Note:
1. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm)
2. By virtue of integrating an application specific type HVIC inside the Module, direct coupling to CPU terminals without any opto-coupler or transformer isolation is possible.
3. V
FO
output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7k
resistance. Please refer to Figure
10.
4. C
SP15
of around 7 times larger than bootstrap capacitor C
BS
is recommended.
5. V
FO
output pulse width should be determined by connecting an external capacitor(C
FOD
) between C
FOD
(pin7) and COM(pin2). (Example : if C
FOD
= 33 nF, then t
FO
=
1.8ms
(typ.)) Please refer to the note 6 for calculation method.
6. Input signal is High-Active type. There is a 3.3k
resistor inside the IC to pull down each input signal line to GND. When employing RC coupling circuits, set up such RC couple
that input signal agree with turn-off/turn-on threshold voltage.
7. To prevent errors of the protection function, the wiring around R
SC
, R
F
and C
SC
should be as short as possible.
8. In the short-circuit protection circuit, please select the R
F
C
SC
time constant in the range 3~4
µs.
9. Each capacitor should be mounted as close to the pins as possible.
10. To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency non-inductive capac-
itor of around 0.1~0.22
µF between P and N pins is recommended.
11. Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays.
12. C
SPC15
should be over 1uF and mounted as close to the pins of the module as possible.
13. N
B1
(pin23) and N
B2
(pin21) should be shorted externally.
Fig. 12. Application Circuit
Fault
15V line
C
BS
C
BSC
R
BS
D
BS
C
SP15
C
SPC15
C
FOD
5V line
R
PF
C
PL
C
BPF
R
S
M
C
DCS
Gating BL
C
PF
C
C
C
C
P
P
P
P
U
U
U
U
R
F
Input Signal for
Short-Circuit Protection
C
SC
Gating AH
COM(L)
VCC
IN(UL)
IN(VL)
IN(WL)
VFO
C(FOD)
C(SC)
OUT(WL)
OUT(VL)
OUT(UL)
N
B1
(23)
N
A
(24)
B (25)
A (26)
P (27)
(16) V
S
(15) V
B
(8) C
SC
(7) C
FOD
(6) V
FO
(5) IN
(L)
(4) NC
(3) NC
(2) COM
(1) V
CC(L)
VCC
VB
OUT
COM
VS
IN
(14) V
CC(H)
(13) IN
(H)
(11) NC
(9) G
(L)
(10) E
(L)
(17) G
(H)
(18) E
(H)
(12) NC
(19) R
(TH)
(20) V
(TH)
N
B2
(21)
NC (22)
R
E(H)
13
www.fairchildsemi.com
FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Detailed Package Outline Drawings
14
www.fairchildsemi.com
FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Detailed Package Outline Drawings
(Continued)
15
www.fairchildsemi.com
FCAS50SN60 Rev. A
FCA
S
50
SN60
Sm
art Powe
r Module
f
o
r
SRM
Detailed Package Outline Drawings
(Continued)
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
IntelliMAXTM
ISOPLANARTM
LittleFETTM
MICROCOUPLERTM
MicroFETTM
MicroPakTM
MICROWIRETM
MSXTM
MSXProTM
OCXTM
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OPTOLOGIC
OPTOPLANARTM
PACMANTM
FAST
FASTrTM
FPSTM
FRFETTM
GlobalOptoisolatorTM
GTOTM
HiSeCTM
I
2
CTM
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Rev. I15
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ActiveArrayTM
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E
2
CMOSTM
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POPTM
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µ
SerDesTM
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SyncFETTM
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UHCTM
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UniFETTM
VCXTM
Across the board. Around the world.TM
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