SED1530 Series
1
SSC5000Series
Dot Matrix LCD Controller Driver
PF777-03
SED1530 Series
s
DESCRIPTION
The SED1530 series is a single-chip LCD driver for dot-matrix liquid crystal displays (LCD's) which is directly
connectable to a microcomputer bus. It accepts 8-bit serial or parallel display data directly sent from a
microcomputer and stores it in an on-chip display RAM. It generates an LCD drive signal independent of
microprocessor clock.
The use of the on-chip display RAM of 65
×
132 bits and a one-to-one correspondence between LCD panel pixel
dots and on-chip RAM bits permits implementation of displays with a high degree of freedom.
As a total of 133 circuits of common and segment outputs are incorporated, a single chip of SED1530 series can
make 33
×
100-dot (16
×
16-dot kanji font: 6 columns
×
2 lines) displays, and a single chip of SED1531 can make
65
×
132-dot (kanji font: 8 columns x 4 lines) displays when the SED1531 is combined with the common driver
SED1635.
The SED1532 can display the 65x200-dot (or 12-column by 4-line Kanji font) area using two ICs in master and
slave modes. As an independent static indicator display is provided for time-division driving, the low-power display
is realized during system standby and others.
No external operation clock is required for RAM read/write operations. Accordingly, this driver can be operated
with a minimum current consumption and its on-board low-current-consumption liquid crystal power supply can
implement a high-performance handy display system with a minimum current consumption and a smallest LSI
configuration.
Two types of SED1530 series are available: one in which common outputs are arranged on a single side and the
other in which common outputs are arranged on both sides.
s
FEATURES
q
Direct RAM data display using the display RAM. When RAM data bit is 0, it is not displayed. When RAM data
bit is 1, it is displayed. (At normal display)
q
RAM capacity: 65
×
132 = 8580 bits
q
High-speed 8-bit microprocessor interface allowing direct connection to both the 8080 and 6800.
q
Serial interface
q
Many command functions: Read/Write Display Data, Display ON/OFF, Normal/Reverse Display, Page
Address Set, Set Display Start Line, Set Column Address, Read Status, All Display ON/OFF, Set LCD Bias,
Electronic contrast Controls, Read Modify Write, Select Segment Driver Direction, Power Save
q
Ultra Low Power Consumption
q
Built-in Power Supply Circuit for LCD
q
133 Driver Output
2
SED1530 Series
Type 1 [V
REG
Temperature gradient 0.2% /
°
C]
· Specifications (for chip models)
Type 2 [V
REG
Temperature gradient 0.00% /
°
C]
s
LINE UP
Name
Duty
LCD bias
Segment driver
COM driver
Display area
Remarks
SED1530D
0
*
1/33
1/5, 1/6
100
33
33
×
100
COM single-side assignment
SED1530D
A
*
1/33
1/5, 1/6
100
33
33
×
100
COM dual-side assignment
SED1531D
0
*
1/65
1/6, 1/8
132
0
65
×
132
SED1635 is used for COM.
SED1532D
0
*
1/65
1/6, 1/8
100
33
65
×
200
COM single-side right assignment
SED1532D
B
*
1/65
1/6, 1/8
100
33
65
×
200
COM single-side left assignment
Name
Duty
LCD bias
Segment driver
COM driver
Display area
Remarks
SED1530D
F
*
1/33
1/5, 1/6
100
33
33
×
100
COM both-side layout
SED1532D
E
*
1/65
1/6, 1/8
100
33
65
×
200
COM single-side, right-hand layout
SED1533D
F
*
1/17
1/5
116
17
17
×
116
COM both-side layout
SED1534D
E
*
1/9
1/5
124
9
9
×
124
COM single-side layout
Note: The SED1530 series has the following subcodes depending on their shapes. (The SED1530 examples are
given.)
SED1530T
**
: TCP (The TCP subcode differs from the inherent chip subcode.)
SED1530D
**
: Bear chips
SED1530D
*
A
: Aluminum pad
SED1530D
*
B
: Gold bump
q
On-chip LCD power circuit: Liquid crystal driving power supply booster circuit, voltage regulator circuit, voltage
follower
×
4.
q
On-chip electronic contrast control functions
q
Ultra low power consumption
q
Power supply voltages: V
DD
- V
SS
-2.4 V to -6.0 V
V
DD
- V5
-4.5 V to -16.0 V (In the case of external power supply)
q
Wide operating temperature range:
Ta = -40 to 85
°
C
q
CMOS process
q
Package: TCP and bare chip
q
Non-radiation-resistant design
SED1530 Series
3
s
BLOCK DIAGRAM (SED1530D
0B
)
O0
O99
···············································
O100
O15
·····················
V2
V4
V
DD
V
SS
V1
V3
V5
CAP1+
CAP1
CAP2+
CAP2
CAP3
FRS
FR
CL
DYO
DOF
M//S
Segment driver
Common driver
Shift register
Power supply
circuit
I/O buffer circuit
132 x 65-dot
display data RAM
Display data latch
Line address decoder
Line counter
Initial display line register
Page address
register
Column address decoder
8-bit column address counter
8-bit column address register
Display timing
generator circuit
Bus holder
Status
register
Oscillator
Microprocessor interface
I/O buffer
COMS
COM S
Output
status
selector
circuit
VS1
CS1 CS2
A0
RD
(E)
WR
(R/W)
C86
P/S RES
D7
(SI)
D6
(SCL)
D5
D4
D3
D2
D1
D0
Command decoder
V
OUT
V
R