© 2000 California Micro Devices Corp. All rights reserved.
11/10/2000
1
CSPPT
CALIFORNIA MICRO DEVICES
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
Chip Scale Parallel Termination Array
Features
· 8,16 or 32 integrated high frequency
bussed terminations
· Ultra small footprint Chip Scale Package
· Ceramic substrate
· 0.35mm Eutectic Solder Bumps, 0.65mm pitch
Product Description
The CSPPT is a high performance Integrated Passive
Device (IPD) which provides parallel terminations
suitable for use in high speed bus applications. Eight (8),
sixteen (16), or thirty-two (32) parallel termination
versions are provided. These resistors provide excellent
high frequency performance in excess of 3GHz and are
manufactured to an absolute tolerance as low as ±1%.
Applications
· Parallel resistive bus termination
· Bussed resistor array
C1290700
SCHEMATIC DIAGRAMS
The Chip Scale Package provides an ultra small
footprint for this IPD and provides minimal parasitics
compared to conventional packaging. Typical bump
inductance is less than 25pH. The large solder bumps
and ceramic substrate allow for standard attachment to
laminate printed circuit boards without the use of
underfill.
CSPPT08
CSPPT16
CSPPT32
R1
R1
B
A
1
2
4
R1
R1
R1
R1
3
R1
5
R1
R1
R1
B
A
1
2
4
R1
R1
R1
R1
3
R1
5
R1
R1
R1
D
C
R1
R1
R1
R1
R1
R1
R1
R1
B
A
1
2
4
R1
R1
R1
R1
3
R1
5
R1
R1
R1
D
C
R1
R1
R1
R1
R1
R1
R1
R1
6
7
9
R1
R1
R1
R1
8
R1
10
R1
R1
R1
R1
R1
R1
R1
R1
R1
©2000 California Micro Devices Corp. All rights reserved.
11/10/2000
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
2
CSPPT
CALIFORNIA MICRO DEVICES
Package Diagram (Bumps Up View)
CSPPT08
CSPPT16
CSPPT32
S
E
U
L
A
V
D
R
A
D
N
A
T
S
e
u
l
a
V
r
o
t
s
i
s
e
R
7
4
=
1
R
,
0
5
,
6
5
,
8
6
,
0
9
,
0
0
1
,
R
e
c
n
a
r
e
l
o
T
e
t
u
l
o
s
b
A
%
5
±
,
%
1
±
s
r
o
t
s
i
s
e
R
f
o
R
C
T
m
p
p
0
0
1
±
r
o
t
s
i
s
e
R
/
g
n
i
t
a
R
r
e
w
o
P
W
m
0
0
1
e
g
n
a
R
e
r
u
t
a
r
e
p
m
e
T
g
n
i
t
a
r
e
p
O
C
°
5
8
o
t
C
°
0
4
1
A
B
2
3
5
4
1.0968mm
0.381mm
0.65
mm
0.65
mm
0.643mm
0.35mm
Dia.
Bumps
0.2234mm
3.0468mm
1
A
B
C
D
2
3
4
5
2.3968mm
0.381mm
0.65
mm
0.65
mm
0.643mm
0.35mm
Dia.
Bumps
0.2234mm
3.0468mm
1
A
B
C
D
2
3
4
5
6
7
8
10
9
2.3968mm
0.381mm
0.65
mm
0.65
mm
0.643mm
0.35mm
Dia.
Bumps
0.2234mm
6.2968mm
© 2000 California Micro Devices Corp. All rights reserved.
11/10/2000
3
CSPPT
CALIFORNIA MICRO DEVICES
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
Typical Solder Reflow Thermal Profile (No Clean Flux)
250
225
200
175
150
125
100
75
50
25
0
48
97
145
Time (s)
T
e
mperature (
o
C)
194
242
290
339
387
435
EXH
RF
Z5
Z4
EXH
PH
Z2
Z3
CD
S
N
O
I
T
A
D
N
E
M
M
O
C
E
R
D
R
A
O
B
T
I
U
C
R
I
C
D
E
T
N
I
R
P
B
C
P
n
o
e
z
i
S
d
a
P
m
m
0
0
3
.
0
e
p
a
h
S
d
a
P
d
n
u
o
R
n
o
i
t
i
n
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f
e
D
d
a
P
)
D
M
S
N
(
s
d
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P
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k
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p
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k
s
a
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d
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S
m
m
0
5
3
.
0
s
s
e
n
k
c
i
h
T
li
c
n
e
t
S
r
e
d
l
o
S
m
m
2
5
1
.
0
g
n
i
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e
p
O
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r
u
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p
A
li
c
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t
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r
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d
l
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)
.
q
s
(
m
m
0
6
3
.
0
o
i
t
a
R
x
u
l
F
r
e
d
l
o
S
0
5
/
0
5
e
t
s
a
P
r
e
d
l
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S
n
a
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l
C
o
N
h
s
i
n
i
F
e
c
a
r
T
d
n
o
B
)
A
6
0
1
s
u
l
P
u
C
k
e
t
n
E
(
P
S
O
PART NUMBER KEY
PACKAGE TYPE
APPLICATION
Tolerance
CSP = Chip Scale
Package
Parallel Termination
Number of
Terminations
08 = 8
16 = 16
32 = 32
F = ±1%
J = ±5%
Resistor
Value Code
R1 Value
First 2 digits
are significant
value. 3rd digit
represents number
of zeros
CSP
PT
YY
XXX
T
©2000 California Micro Devices Corp. All rights reserved.
11/10/2000
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
4
CSPPT
CALIFORNIA MICRO DEVICES
N
O
I
T
A
M
R
O
F
N
I
G
N
I
R
E
D
R
O
T
R
A
P
D
R
A
D
N
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T
S
e
g
a
k
c
a
P
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b
m
u
N
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t
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T
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&
e
p
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T
g
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k
r
a
M
t
r
a
P
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l
a
c
S
p
i
h
C
8
F
0
7
4
-
8
0
T
P
P
S
C
e
n
o
N
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l
a
c
S
p
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h
C
8
J
0
7
4
-
8
0
T
P
P
S
C
e
n
o
N
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l
a
c
S
p
i
h
C
8
F
0
0
5
-
8
0
T
P
P
S
C
e
n
o
N
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l
a
c
S
p
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h
C
8
J
0
0
5
-
8
0
T
P
P
S
C
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n
o
N
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l
a
c
S
p
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h
C
8
F
0
6
5
-
8
0
T
P
P
S
C
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n
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N
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a
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S
p
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C
8
J
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6
5
-
8
0
T
P
P
S
C
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n
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N
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l
a
c
S
p
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h
C
8
F
0
8
6
-
8
0
T
P
P
S
C
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n
o
N
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l
a
c
S
p
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h
C
8
J
0
8
6
-
8
0
T
P
P
S
C
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p
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C
8
F
0
0
9
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8
0
T
P
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S
C
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C
8
J
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8
0
T
P
P
S
C
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C
8
F
1
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1
-
8
0
T
P
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S
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C
8
J
1
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1
-
8
0
T
P
P
S
C
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p
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C
6
1
F
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7
4
-
6
1
T
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C
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C
6
1
J
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4
-
6
1
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6
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3
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