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Part Number BS616UV4016

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BSI
Ultra Low Power/High Speed CMOS SRAM
256K X 16 bit
BS616UV4016
R0201-BS616UV4016
1
Revision 1.3
Sep. 2005
n
FEATURES
Y
Wide V
CC
operation voltage :
C-grade : 1.8V ~ 3.6V
I-grade : 1.9V ~ 3.6V
(V
CC
_min.=1.65V at 25
O
C)
Y
Ultra low power consumption :
V
CC
= 2.0V
C-grade : 10mA(Max.) operating current
I-grade : 12mA(Max.) operating current
0.3uA (Typ.) CMOS standby current
V
CC
= 3.0V
C-grade : 13mA(Max.) operating current
I-grade : 15mA(Max.) operating current
0.45uA (Typ.) CMOS standby current
Y
High speed access time :
-85
85ns (Max.)
-10
100ns (Max.)
Y
Automatic power down when chip is deselected
Y
Easy expansion with CE and OE options
Y
I/O Configuration x8/x16 selectable by LB and UB pin.
Y
Three state outputs and TTL compatible
Y
Fully static operation
Y
Data retention supply voltage as low as 1.2V
n
DESCRIPTION
The BS616UV4016 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 262,144 words by 16 bits and
operates form a wide range of 1.8V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with typical CMOS standby current of
0.3uA at 2.0V/25
O
C and maximum access time of 85ns at 85
O
C.
Easy memory expansion is provided by an active LOW chip enable (CE)
and active LOW output enable (OE) and three-state output drivers.
The BS616UV4016 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616UV4016 is available in DICE form, JEDEC standard 44-pin
TSOP Type II and 48-ball BGA package.
n
PRODUCT FAMILY
POWER DISSIPATION
SPEED
(ns)
STANDBY
(I
CCSB1
, Max)
Operating
(I
CC
, Max)
PRODUCT
FAMILY
OPERATING
TEMPERATURE
V
CC
RANGE
C-grade : 1.8~3.6V
I-grade : 1.9~3.6V
V
CC
=3.0V V
CC
=2.0V V
CC
=3.0V
V
CC
=2.0V
PKG TYPE
BS616UV4016DC
DICE
BS616UV4016EC
TSOP2-44
BS616UV4016AC
+0
O
C to +70
O
C
1.8V ~ 3.6V
85/100
6.0uA
3.0uA
13mA
10mA
BGA-48-0608
BS616UV4016DI
DICE
BS616UV4016EI
TSOP2-44
BS616UV4016AI
-40
O
C to +85
O
C
1.9V ~ 3.6V
85/100
8.0uA
5.0uA
15mA
12mA
BGA-48-0608
n
PIN CONFIGURATIONS



















n
BLOCK DIAGRAM





Brilliance Semiconductor, Inc.
reserves the right to modify document contents without notice.
G
H
F
E
D
C
B
A
1
2
3
4
5
6
A9
A11
A10
NC
A12
A14
A13
A15
WE
IO13
IO5
IO7
IO6
A17
A16
A7
VSS
VCC
IO12
IO11
IO4
IO3
NC
A5
OE
A3
A0
A6
A4
A1
A2
NC
LB
IO10
IO1
CE
IO2
IO0
48-ball BGA top view
UB
IO8
IO9
VSS
VCC
IO14
IO15
NC
NC
A8
A4
A3
A2
A1
A0
CE
IO0
IO1
IO2
IO3
VCC
GND
IO4
IO5
IO6
IO7
WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
BS616UV4016EC
BS616UV4016EI
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
IO15
IO14
IO13
IO12
GND
VCC
IO11
IO10
IO9
IO8
NC
A8
A9
A10
A11
A12
Address
Input
Buffer
Row
Decoder
Memory Array
1024 x 4096
Column I/O
Write Driver
Sense Amp
Column Decoder
Address Input Buffer
Data
Input
Buffer
Control
IO0
.
.
.
.
.
.
IO15
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
16
16
16
16
8
256
2048
1024
10
A13
Data
Output
Buffer
CE
WE
OE
UB
LB
V
CC
GND
A14
.
.
.
.
.
.
A15 A16 A17 A0
A2
A1
BSI
BS616UV4016
2
R0201-BS616UV4016
Revision 1.3
Sep. 2005
n
PIN DESCRIPTIONS
Name
Function
A0-A17 Address Input
These 18 address inputs select one of the 262,144 x 16-bit words in the RAM
CE Chip Enable 1 Input
CE is active LOW. Chip enable must be active when data read form or write to the
device. If either chip enable is not active, the device is deselected and is in standby
power mode. The IO pins will be in the high impedance state when the device is
deselected.
WE Write Enable Input
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the IO
pins; when WE is LOW, the data present on the IO pins will be written into the selected
memory location.
OE Output Enable Input
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the IO pins and they
will be enabled. The IO pins will be in the high impendence state when OE is inactive.
LB and UB Data Byte Control Input
Lower byte and upper byte data input/output control pins.
IO0-IO15 Data Input/Output
Ports
16 bi-directional ports are used to read data from or write data into the RAM.
V
CC
Power Supply
GND
Ground

n
TRUTH TABLE
MODE
CE
WE
OE
LB
UB
IO0~IO7
IO8~IO15
V
CC
CURRENT
H
X
X
X
X
High Z
High Z
I
CCSB
, I
CCSB1
Chip De-selected
(Power Down)
X
X
X
H
H
High Z
High Z
I
CCSB
, I
CCSB1
L
H
H
L
X
High Z
High Z
I
CC
Output Disabled
L
H
H
X
L
High Z
High Z
I
CC
L
L
D
OUT
D
OUT
I
CC
H
L
High Z
D
OUT
I
CC
Read
L
H
L
L
H
D
OUT
High Z
I
CC
L
L
D
IN
D
IN
I
CC
H
L
X
D
IN
I
CC
Write
L
L
X
L
H
D
IN
X
I
CC

NOTES: H means V
IH
; L means V
IL
; X means don
'
t care (Must be V
IH
or V
IL
state)
BSI
BS616UV4016
3
R0201-BS616UV4016
Revision 1.3
Sep. 2005
n
ABSOLUTE MAXIMUM RATINGS
(1)
SYMBOL
PARAMETER
RATING
UNITS
V
TERM
Terminal Voltage with
Respect to GND
-0.5
(2)
to 4.6V
V
T
BIAS
Temperature Under
Bias
-40 to +85
O
C
T
STG
Storage Temperature
-60 to +150
O
C
P
T
Power Dissipation
1.0
W
I
OUT
DC Output Current
20
MA

1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
reliability.
2.
­
2.0V in case of AC pulse width less than 30 ns

n
OPERATING RANGE
RANG
AMBIENT
TEMPERATURE
Vcc
Commercial
0
O
C to + 70
O
C
1.8V ~ 3.6V
Industrial
-40
O
C to + 85
O
C
1.9V ~ 3.6V

n
CAPACITANCE
(1)
(T
A
= 25
O
C, f = 1.0MHz)
SYMBOL PAMAMETER CONDITIONS MAX. UNITS
C
IN
Input
Capacitance
V
IN
= 0V
6
pF
C
IO
Input/Output
Capacitance
V
I/O
= 0V
8
pF

1. This parameter is guaranteed and not 100% tested.
n
DC ELECTRICAL CHARACTERISTICS (T
A
= -40
O
C to +85
O
C)
PARAMETER
NAME
PARAMETER
TEST CONDITIONS
MIN.
TYP.
(1)
MAX.
UNITS
V
CC
Power Supply
1.9
--
3.6
V
V
CC
=2.0V
0.6
V
IL
Input Low Voltage
V
CC
=3.0V
-0.3
(2)
--
0.8
V
V
CC
=2.0V
1.4
V
IH
Input High Voltage
V
CC
=3.0V
2.0
--
V
CC
+0.3
(3)
V
I
IL
Input Leakage Current
V
IN
= 0V to V
CC
,
CE = V
IH
--
--
1
uA
I
LO
Output Leakage Current
V
I/O
= 0V to V
CC
CE= V
IH
, or OE = V
IH
--
--
1
uA
V
CC
= Max, I
OL
= 0.1mA
V
CC
=2.0V
0.2
V
OL
Output Low Voltage
V
CC
= Max, I
OL
= 2.0mA
V
CC
=3.0V
--
--
0.4
V
V
CC
= Min, I
OH
= -0.1mA
V
CC
=2.0V
V
CC
-0.2
V
OH
Output High Voltage
V
CC
= Min, I
OH
= -1.0mA
V
CC
=3.0V
2.4
--
--
V
V
CC
=2.0V
12
I
CC
Operating
Power
Supply
Current
CE = V
IL
,
I
IO
= 0mA, f = F
MAX
(4)
V
CC
=3.0V
--
--
15
mA
V
CC
=2.0V
0.5
I
CCSB
Standby Current
­
TTL
CE = V
IH
,
I
IO
= 0mA
V
CC
=3.0V
--
--
1.0
mA
V
CC
=2.0V
0.3
5.0
I
CCSB1
(5)
Standby Current
­
CMOS
CE
V
CC
-0.2V,
V
IN
V
CC
-0.2V or V
IN
0.2V
V
CC
=3.0V
--
0.45
8.0
uA

1. Typical characteristics are at T
A
=25
O
C.
2. Undershoot: -1.0V in case of pulse width less than 20 ns.
3. Overshoot: VCC+1.0V in case of pulse width less than 20 ns.
4. F
MAX
=1/t
RC.
5. I
CCSB1(MAX)
is 3.0/6.0uA at V
CC
=2.0V/3.0V and T
A
=70
O
C.
BSI
BS616UV4016
4
R0201-BS616UV4016
Revision 1.3
Sep. 2005
n
DATA RETENTION CHARACTERISTICS (T
A
= -40
O
C to +85
O
C)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
(1)
MAX.
UNITS
V
DR
V
CC
for Data Retention
CE
V
CC
-0.2V,
V
IN
V
CC
-0.2V or V
IN
0.2V
1.2
--
--
V
I
CCDR
(3)
Data Retention Current
CE
V
CC
-0.2V,
V
IN
V
CC
-0.2V or V
IN
0.2V
--
0.15
1.7
uA
t
CDR
Chip Deselect to Data
Retention Time
0
--
--
ns
t
R
Operation Recovery Time
See Retention Waveform
t
RC
(2)
--
--
ns
1. V
CC
=1.2V, T
A
=25
O
C.
2. t
RC
= Read Cycle Time.
3. I
CCRD_Max.
is 1.2uA at T
A
=70
O
C.

n
LOW V
CC
DATA RETENTION WAVEFORM (1) (CE Controlled)









n
AC TEST CONDITIONS
(Test Load and Input/Output Reference)
Input Pulse Levels
Vcc / 0V
Input Rise and Fall Times
1V/ns
Input and Output Timing
Reference Level
0.5Vcc
t
CLZ
, t
OLZ
, t
CHZ
, t
OHZ
, t
WHZ
C
L
= 5pF+1TTL
Output Load
Others
C
L
= 30pF+1TTL









1. Including jig and scope capacitance.

n
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
OUTPUTS
MUST BE
STEADY
MUST BE
STEADY
MAY CHANGE
FROM
"
H
"
TO
"
L
"
WILL BE CHANGE
FROM
"
H
"
TO
"
L
"
MAY CHANGE
FROM
"
L
"
TO
"
H
"
WILL BE CHANGE
FROM
"
L
"
TO
"
H
"
DON
'
T CARE
ANY CHANGE
PERMITTED
CHANGE :
STATE UNKNOW
DOES NOT
APPLY
CENTER LINE IS
HIGH INPEDANCE
"
OFF
"
STATE
C
L
(1)
1 TTL
Output
ALL INPUT PULSES
90%
V
CC
GND
Rise Time:
1V/ns
Fall Time:
1V/ns
90%
10%
10%
Data Retention Mode
V
CC
t
CDR
V
CC
t
R
V
IH
V
IH
CE
V
CC
- 0.2V
V
DR
1.0V
CE
V
CC
BSI
BS616UV4016
5
R0201-BS616UV4016
Revision 1.3
Sep. 2005
n
AC ELECTRICAL CHARACTERISTICS (T
A
= -40
O
C to +85
O
C)
READ CYCLE
JEDEC
PARAMETER
NAME
PARANETER
NAME
DESCRIPTION
CYCLE TIME : 85ns
(V
CC
=1.9~3.6V)
MIN. TYP. MAX.
CYCLE TIME : 100ns
(V
CC
=1.9~3.6V)
MIN. TYP. MAX.
UNITS
t
AVAX
t
RC
Read Cycle Time
85
--
--
100
--
--
ns
t
AVQX
t
AA
Address Access Time
--
--
85
--
--
100
ns
t
ELQV
t
ACS
Chip Select Access Time
(CE)
--
--
85
--
--
100
ns
t
BLQV
t
BA
(1)
Data Byte Control Access Time
(LB, UB)
--
--
40
--
--
50
ns
t
GLQV
t
OE
Output Enable to Output Valid
--
--
40
--
--
50
ns
t
ELQX
t
CLZ
Chip Select to Output Low Z
(CE) 15
--
--
15
--
--
ns
t
BLQX
t
BE
Data Byte Control to Output Low Z
(LB, UB) 15
--
--
15
--
--
ns
t
GLQX
t
OLZ
Output Enable to Output Low Z
15
--
--
15
--
--
ns
t
EHQZ
t
CHZ
Chip Select to Output High Z
(CE)
--
--
35
--
--
40
ns
t
BHQZ
t
BDO
Data Byte Control to Output High Z (LB, UB)
--
--
35
--
--
40
ns
t
GHQZ
t
OHZ
Output Enable to Output High Z
--
--
35
--
--
40
ns
t
AVQX
t
OH
Data Hold from Address Change
15
--
--
15
--
--
ns
NOTE :
1. t
BA
is 40ns/50ns(@speed=85ns/100ns) with address toggle; t
BA
is 85ns/100ns(@speed=85ns/100ns) without address toggle

n
SWITCHING WAVEFORMS (READ CYCLE)

READ CYCLE 1
(1,2,4)











READ CYCLE 2
(1,3,4)










t
RC
t
OH
t
AA
D
OUT
ADDRESS
t
OH
t
CLZ
(5)
t
CHZ
(5)
D
OUT
LB, UB
CE
t
BA
t
ACS
t
BE
t
BDO