6069AATARM05/04
Features
·
ARM7TDMI
®
ARM
®
Thumb
®
Processor Core
In-Circuit Emulator, 36 MHz operation
·
Ethernet Bridge
Dual Ethernet 10/100 Mbps MAC Interface
16-Kbyte Frame Buffer
·
1 K-Byte Boot ROM, Embedding a Boot Program
Enable Application Download from DataFlash
®
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External Bus Interface
On-chip 32-bit SDRAM Controller
4-Chip Select Static Memory Controller
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Multi-level Priority, Individually Maskable, Vectored Interrupt Controller
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Three 16-bit Timer/Counters
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Two UARTs with Modem Control Lines
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Serial Peripheral Interface (SPI)
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Two PIO Controllers, Managing up to 48 General-purpose I/O Pins
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Available in a 256-ball BGA Package
·
Power Supplies
VDDIO 3.3V nominal
VDDCORE and VDDOSC 1.8V nominal
·
-40°C to + 85°C Operating Temperature Range
Description
The AT91C140 is a member of the Atmel AT91 16- and 32-bit microcontroller family
based on the ARM7TDMI processor core. This processor has a high performance
32-bit RISC architecture with a high density 16-bit instruction set and very low power
consumption.
In addition, the AT91C140 integrates a double Ethernet 10/100 base-T MAC capable
of operating as an Ethernet bridge, thus making it ideally suited for networking appli-
cations. It supports a wide range of memory devices such as SDRAM, SRAM and
Flash and embeds an extensive array of peripherals.
The device is manufactured using Atmel's high-density CMOS technology. By combin-
ing the ARM7TDMI processor core with an expansive assortment of peripheral
functions and low-power oscillators and PLL on a monolithic chip, the Atmel
AT91C140 is a powerful microcontroller that provides a highly flexible and cost effec-
tive solution to many networking applications.
AT91
®
ARM
®
Thumb
Microcontrollers
AT91C140
2
AT91C140
6069AATARM05/04
Block Diagram
Figure 1. AT91C140 Block Diagram
SPI
Peripheral Data
Controller
ARM7TDMI Processor
External Bus
Interface
SDRAMC
System
Controller
Boot ROM
Ethernet
10/100 Mbps
MAC Interface
ICE
Ethernet
10/100 Mbps
MAC Interface
16k Bytes
SRAM
ASB/ASB
Bridge
SMC
JTAG Debug
Interface
MII PHY
Interface
MII PHY
Interface
OSC.
PLL
Interrupt and
Fast Interrupt
Advanced
Interrupt
Controller
I/O Lines
PIO Controller A
I/O Lines
PIO Controller B
Serial Peripherals
Boot DataFlash
USART A
Serial Port
USART B
Serial Port
PWM Signals
Timer/Counter 0
PWM Signals
Timer/Counter 1
PWM Signals
Timer/Counter 2
16- or 32-bit data
Memory Bus
Peripheral Bridge
5
AT91C140
6069AATARM05/04
Mechanical Overview of
the 256-ball BGA
Package
Figure 2 below shows the orientation of the 256-ball BGA Package.
For a detailed mechanical description, see "Mechanical Characteristics and Packaging"
on page 162.
Figure 2. 256-ball BGA Package Orientation (Top View)
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
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