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Part Number AT83SND2CMP3

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Rev. 7524A­MP3­07/05
Features
·
MPEG I/II-Layer 3 Hardwired Decoder
­ Stand-alone MP3 Decoder
­ 48, 44.1, 32, 24, 22.05, 16 kHz Sampling Frequency
­ Separated Digital Volume Control on Left and Right Channels (Software Control
using 31 Steps)
­ Bass, Medium, and Treble Control (31 Steps)
­ Bass Boost Sound Effect
­ Ancillary Data Extraction
­ CRC Error and MPEG Frame Synchronization Indicators
·
20-bit Stereo Audio DAC
­ 93 dB SNR Playback Stereo Channel
­ 32 Ohm/ 20 mW Stereo Headset Drivers
­ Stereo Line Level Input, Differential Mono Auxiliary Input
·
Programmable Audio Output for Interfacing with External Audio System
­ I
2
S Format Compatible
·
Mono Audio Power Amplifier
­ 440mW on 8 Ohms Load
·
USB Rev 1.1 Controller
­ Full Speed Data Transmission
·
Built-in PLL
­ MP3 Audio Clocks
­ USB Clock
·
MultiMediaCard
®
Interface, Secure Digital Card Interface
·
Standard Full Duplex UART with Baud Rate Generator
·
Power Management
­ Power-on Reset
­ Idle Mode, Power-down Mode
·
Operating Conditions:
­ 2.7 to 3V,
±10%, 25 mA Typical Operating at 25°C
­ 37 mA Typical Operating at 25°C Playing Music on Earphone
­ Temperature Range: -40
°C to +85°C
­ Power Amplifier Supply 3.2V to 5.5V
·
Packages
­ CTBGA 100-pin
Typical
Applications
·
MP3-Player
·
PDA, Camera, Mobile Phone MP3
·
Car Audio/Multimedia MP3
·
Home Audio/Multimedia MP3
·
Toys
·
Industrial Background Music / Ads
Single-Chip MP3
Decoder with
Full Audio
Interface
AT83SND2CMP3
Preliminary
2
AT83SND2CMP3
7524A­MP3­07/05
Description
The AT83SND2CMP3 has been developped as a versatile remote controlled MP3
player for very fast MP3 feature implementation into most existing system. It perfectly
fits features needed in mobile phones and toys, but can also be used in any portable
equipment and in industrial applications.
Audio files and any other data can be stored in a Nand Flash memory or in a removable
Flash card such as MultiMediaCard (MMC) or Secure Digital Card (SD). Music collec-
tions are very easy to build, as data can be stored using the standard FAT12/16 and
FAT32 file system.
Thanks to the USB port, data can be transferred and maintained from and to any com-
puter based on Windows
®
, Linux
®
and Mac OS
®
.
File system is controlled by the AT83SND2CMP3 so the host controller does not have to
handle it.
In addition to the USB device port, the MP3 audio system can be connected to any
embedded host through a low cost serial link UART. Host controller can fully remote
control the MP3 decoder behaviour using a command protocol over the serial link.
File system is controlled by the AT83SND2CMP3 so host controller does not have to
handle it.
Files can also be uploaded or dowloaded from host environment to NAND Flash or
Flash Card.
3
AT83SND2CMP3
7524A­MP3­07/05
1. Block Diagram
Figure 2. Block Diagram
Clock and PLL
Unit
Control Unit
Interrupt
Handler Unit
FILT
X2
X1
MP3
SD / MMC
Interface
I/OPorts
MDAT
P0-P4
VSS
VDD
Keyboard
Interface
KIN0
I
2
S/PCM
Audio
INT0
INT1
3
Alternate function of Port 3
4
Alternate function of Port 4
Timers 0/1
T1
T0
MCLK
MCMD
RST
DSEL
DCLK
SCLK
DOUT
USB
Controller
D+
D-
UART
RXD
TXD
Watchdog
UVSS
UVDD
and
BRG
3
3
3
3
3
Audio
Decoder
Interface
PA
Audio
DAC
Unit
HSR
HSL
AUXP
3
AUXN
LINEL
LINER
MONOP
MONON
PAINP
PAINN
HPP
HPN
X1
X2
4
AT83SND2CMP3
7524A­MP3­07/05
Pin Description
Pinouts
Figure 3. AT83SND2CMP3 100-pin BGA Package
1. NC = Do Not Connect
AUXN
8
9
7
6
5
4
3
2
C
B
A
D
E
F
G
H
1
NC
NC
AUDVDD
HSVDD
HSVSS
AUDVSS
AUDVCM
NC
HSL
HSR
PVSS
INGND
D+
P0.0/
NC
PVDD
LINEL
X2
D-
NC
P0.3/
NC
AUDVREF
FILT
LINER
X1
VSS
VSS
MONON
P0.4/
P0.5/
VSS
P3.0/
TST
P3.6/
VDD
P4.2/
P0.6/
P0.7/
VDD
P3.1/
P3.4/
P3.5/
P3.7/
P4.1/
P4.0/
P4.3/
NC
ESDVSS
P3.2/
DSEL
DCLK
LPHN
P2.0/
P2.1/
P2.5/
MCLK
VDD
NC
SCLK
DOUT
CBP
NC
P2.2/
P2.3/
P2.7/
VSS
MDAT
AUDRST
VSS
AUDVSS
J
P0.2/
P0.1/
NC
AUXP
MONOP
AD7
WR
NC
VDD
P2.4/
P2.6/
NC
MCMD
RST
NC
VDD
UVSS
UVDD
VDD
P3.3/
AUDVSS
HPN
AUDVBAT
HPP
PAINN
PAINP
K
A8
KIN0
AD0
AD4
AD3
AD2
AD1
SCL
SDA
AD5
A9
A10
A11
A12
A13
A14
A15
T0
T1
TXD
RXD
RD
INT1
INT0
10
AD6
NC
5
AT83SND2CMP3
7524A­MP3­07/05
Signals
All the AT83SND2CMP3 signals are detailed by functionality in following tables.
Table 1. Ports Signal Description
Table 2. Clock Signal Description
Table 3. Timer 0 and Timer 1 Signal Description
Signal
Name
Type
Description
Alternate
Function
P0.7:0
I/O
Port 0
P0 is an 8-bit open-drain bidirectional I/O port. Port 0 pins that have 1s
written to them float and can be used as high impedance inputs. To
avoid any parasitic current consumption, floating P0 inputs must be
polarized to V
DD
or V
SS
.
AD7:0
P2.7:0
I/O
Port 2
P2 is an 8-bit bidirectional I/O port with internal pull-ups.
A15:8
P3.7:0
I/O
Port 3
P3 is an 8-bit bidirectional I/O port with internal pull-ups.
RXD
TXD
INT0
INT1
T0
T1
WR
RD
P4.3:0
I/O
Port 4
P4 is an 8-bit bidirectional I/O port with internal pull-ups.
Signal
Name
Type
Description
Alternate
Function
X1
I
Input to the on-chip inverting oscillator amplifier
To use the internal oscillator, a crystal/resonator circuit is connected to
this pin. If an external oscillator is used, its output is connected to this
pin. X1 is the clock source for internal timing.
-
X2
O
Output of the on-chip inverting oscillator amplifier
To use the internal oscillator, a crystal/resonator circuit is connected to
this pin. If an external oscillator is used, leave X2 unconnected.
-
FILT
I
PLL Low Pass Filter input
FILT receives the RC network of the PLL low pass filter.
-
Signal
Name
Type
Description
Alternate
Function
INT0
I
Timer 0 Gate Input
INT0 serves as external run control for timer 0, when selected by
GATE0 bit in TCON register.
External Interrupt 0
INT0 input sets IE0 in the TCON register. If bit IT0 in this register is set,
bit IE0 is set by a falling edge on INT0#. If bit IT0 is cleared, bit IE0 is
set by a low level on INT0#.
P3.2