6014APMGMT10/03
Features
·
300 mA/1.9V/2.5V DC to DC for Co-processor Core
·
80 mA/2.8V Dual-mode LDO for Memories (LDO1)
·
130 mA/2.7V/2.8V LDO for Camera Module (LDO2)
·
130 mA/2.8V LDO for Analog Section Supply of Audio Stereo Codec (LDO6)
·
10 mA/1.8V/2.8V LDO for Digital Section Supply of Audio Stereo Codec (LDO7)
·
130 mA/2.8V LDO for Analog Section Supply of Bluetooth
®
Module (LDO4)
·
130 mA/2.8V LDO for Digital Section Supply of Bluetooth
®
Module (LDO5)
·
2 mA/2.4V/2.7V LDO for Low-power Device Control (LDO3)
·
Open Drain Switch
·
Three-channel Level Shifters
·
LED Driver
·
0.5 mA/1.5V Bufferized Voltage Reference
·
Power Management Start-up Controller and Reset Generation
·
Over- and Under-voltage Protections
·
Over-temperature Protection
·
Shutdown, Sleep and Enable Modes
·
Straightforward and Easy Interfacing to any Baseband Controller
·
Small 5 mm x 5 mm, 49-ball BGA Package
Description
The AT73C204 device provides an integrated power management solution for the add-
on multimedia features in new-generation mobile phones. These features include a
camera module, sound system for polyphonic ringing tones, memory module for
downloaded MP3 files, Bluetooth module for cordless headset, etc. The most common
approach to the IC architecture of these new-generation mobile phones is a baseband
processor for the basic telephony functions and a separate co-processor for the multi-
media features. Atmel proposes the AT73C202 for power management of the
baseband processor and RF elements, and the AT73C204 for power management of
the multimedia features.
The AT73C204 is suitable for any telecommunications standard: GSM/GPRS, PDS,
CDMA, CDMA2000, WCDMA or UMTS. It is packaged in a small form-factor 49-ball
5 mm x 5 mm BGA package.
Power
Management for
Mobiles (PM)
AT73C204
3
AT73C204
6014APMGMT10/03
Pin Description
Table 1. AT73C204 Pin Description
Signal
Ball
Type
Description
LEDI
C1
I
LED driver input
LEDO
C2
O
LED driver output
VINF
E1
Power Supply
Input voltage
Power On Block
CE
D5
I
Chip Enable
GNDF
C6
Ground
Ground
RES-B
F6
O
Reset open collector output
GNDG
E5
Ground
Ground
Baseband Supply Block
VINA
G6
Power Supply
Input supply for DC-DC converter
LX
F7
O
DC-DC converter Output Inductor
DM
G5
I
Low-power/Full-power selector
VOUTO
G4
O
DC-DC converter output
GNDA
G7
Ground
Ground of DC-DC Converter
VINB
A5
Input supply for LDO1, LDO2, LDO3
EN2
B5
I
Enable LDO2
VOUT2
B4
O
LDO2 output voltage
GNDB
A7
Ground
Ground for LDO1, LDO2, LDO3
VOUT1
B6
O
LDO1 output voltage
VREF
B7
O
Bufferized voltage reference
VOUT3
A6
O
LDO3 output voltage
RF Supply Block
VINC
A3
Power Supply
Input supply for LDO4, LDO5
EN4
B2
I
Enable LDO4
EN5
C4
I
Enable LDO5
VOUT4
B1
O
LDO4 output voltage
GNDC
A2
Ground
Ground for LDO4, LDO5
VOUT5
A1
O
LDO5 output voltage
Vibrator and Buzzer Driver Block
VIND
D7
Power Supply
LDO6 input supply
EN6
E6
I
Enable LDO6
VOUT6
E7
O
LDO6 output voltage
SWI
C5
I
Open drain enable
SWO
B3
O
Open drain output
4
AT73C204
6014APMGMT10/03
Figure 2. AT73C204 Pin Configuration in 49-ball BGA Package
GNDD
A4
Ground
Open drain ground
SIM Interface Block
VINE
G1
Power Supply
LDO7 input supply
EN7
G3
I
Enable LDO7
DVB
F4
I
Dual-voltage setting on LDO7
LSI1
E4
I
Channel 1 level shifter input
LSI2
F3
I
Channel 2 level shifter input
LSI3
G2
IO
Channel 3 level shifter input
VOUT7
E3
O
LDO7 output voltage
LSO1
F1
O
Channel 1 level shifter output
LSO2
F2
O
Channel 2 level shifter output
LSO3
E2
IO
Channel 3 level shifter output
Miscellaneous
CREF
C7
IO
Band gap decoupling
GNDE
D1
Ground
Digital ground
DVA
D4
I
Dual-voltage setting for DC-DC, LDO2, LDO3
NC
D2
NC
D3
NC
C3
NC
D6
Table 1. AT73C204 Pin Description (Continued)
Signal
Ball
Type
Description
A
B
C
D
E
F
G
1
2
3
4
5
6
7
VOUT5
VOUT4
LEDI
GNDE
VINF
LSO1
VINE
GNDC
EN4
LED0
NC
LSO3
LSO2
LSI3
VINC
SWO
NC
NC
VOUT7
LSI2
EN7
GNDD
VOUT2
EN5
DVA
LSI1
DVB
VOUT0
VINB
EN2
SWI
CE
GNDG
NC
DM
VOUT3
VOUT1
GNDF
NC
EN6
RESB
VINA
GNDB
VREF
CREF
VIND
VOUT6
LX
GNDA
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