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Part Number AD8038

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REV. B
a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
AD8038/AD8039
Low Power 350 MHz
Voltage Feedback Amplifiers
FEATURES
Low Power
1 mA Supply Current/Amp
High Speed
350 MHz, ­3 dB Bandwidth (G = +1)
425 V/ s Slew Rate
Low Cost
Low Noise
8 nV/
Hz @ 100 kHz
600 fA/
Hz @ 100 kHz
Low Input Bias Current: 750 nA Max
Low Distortion
­90 dB SFDR @ 1 MHz
­65 dB SFDR @ 5 MHz
Wide Supply Range: 3 V to 12 V
Small Packaging: SOT23-8, SC70-5, and SOIC-8
APPLICATIONS
Battery-Powered Instrumentation
Filters
A/D Driver
Level Shifting
Buffering
High Density PC Boards
Photo Multiplier
SOIC-8 (R) and SOT23-8 (RT)
*
AD8039
8
7
6
5
1
2
3
4
V
OUT1
­IN1
+IN1
­V
S
+V
S
V
OUT2
­IN2
+IN2
PRODUCT DESCRIPTION
The AD8038 (single) and AD8039 (dual) amplifiers are high
speed (350 MHz) voltage feedback amplifiers with an exceptionally
low quiescent current of 1.0 mA/amplifier typical (1.5 mA max).
The AD8038 single amplifier in the SOIC-8 package has a
disable feature. Despite being low power and low cost, the
amplifier provides excellent overall performance. Additionally,
it offers a high slew rate of 425 V/
µs and low input offset volt-
age of 3 mV max.
ADI's proprietary XFCB process allows low noise operation
(8 nV/
Hz and 600 fA/
Hz) at extremely low quiescent currents.
Given a wide supply voltage range (3 V to 12 V), wide bandwidth,
and small packaging, the AD8038 and AD8039 amplifiers are
designed to work in a variety of applications where power and space
are at a premium.
The AD8038 and AD8039 amplifiers have a wide input common-
mode range of 1 V from either rail and will swing within 1 V of
each rail on the output. These amplifiers are optimized for
driving capacitive loads up to 15 pF. If driving larger capaci-
tive loads, a small series resistor is needed to avoid excessive
peaking or overshoot.
The AD8039 amplifier is the only dual low power, high speed
amplifier available in a tiny SOT23-8 package, and the single
AD8038 is available in both a SOIC-8 and a SC70-5 package.
These amps are rated to work over the industrial temperature
range of ­40
°C to +85°C.
­6
0.1
1000
1
10
100
­3
0
3
6
9
12
15
18
21
24
FREQUENCY ­ MHz
GAIN ­ dB
G = +5
G = +2
G = +1
G = +10
Figure 1. Small Signal Frequency Response for
Various Gains, V
OUT
= 500 mV p-p, V
S
=
±5 V
*Not yet released
SOIC-8 (R)
8
7
6
5
1
2
3
4
NC
­IN
+IN
DISABLE
+V
S
V
OUT
NC
­V
S
AD8038
NC = NO CONNECT
SC70-5 (KS)
1
2
3
5
4 ­IN
+IN
+V
S
V
OUT
AD8038
+ ­
­V
S
CONNECTION DIAGRAMS
REV. B
­2­
AD8038/AD8039­SPECIFICATIONS
(T
A
= 25 C, V
S
= 5 V, R
L
= 2 k , Gain = +1, unless otherwise noted.)
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
­3 dB Bandwidth
G = 1, V
O
= 0.5 V p-p
300
350
MHz
G = 2, V
O
= 0.5 V p-p
175
MHz
G = 1, V
O
= 2 V p-p
100
MHz
Bandwidth for 0.1 dB Flatness
G = 2, V
O
= 0.2 V p-p
45
MHz
Slew Rate
G = 1, V
O
= 2 V Step, R
L
= 2 k
400
425
V/
µs
Overdrive Recovery Time
G = 2, 1 V Overdrive
50
ns
Settling Time to 0.1%
G = 2, V
O
= 2 V Step
18
ns
NOISE/HARMONIC PERFORMANCE
SFDR
Second Harmonic
f
C
= 1 MHz, V
O
= 2 V p-p, R
L
= 2 k
­90
dBc
Third Harmonic
f
C
= 1 MHz, V
O
= 2 V p-p, R
L
= 2 k
­92
dBc
Second Harmonic
f
C
= 5 MHz, V
O
= 2 V p-p, R
L
= 2 k
­65
dBc
Third Harmonic
f
C
= 5 MHz, V
O
= 2 V p-p, R
L
= 2 k
­70
dBc
Crosstalk, Output-to-Output (AD8039)
f = 5 MHz, G = 2
­70
dB
Input Voltage Noise
f = 100 kHz
8
nV/
Hz
Input Current Noise
f = 100 kHz
600
fA/
Hz
DC PERFORMANCE
Input Offset Voltage
0.5
3
mV
Input Offset Voltage Drift
4.5
µV/°C
Input Bias Current
400
750
nA
Input Bias Current Drift
3
nA/
°C
Input Offset Current
25
±nA
Open-Loop Gain
V
O
=
±2.5 V
70
dB
INPUT CHARACTERISTICS
Input Resistance
10
M
Input Capacitance
2
pF
Input Common-Mode Voltage Range
R
L
= 1 k
±4
V
Common-Mode Rejection Ratio
V
CM
=
±2.5 V
61
67
dB
OUTPUT CHARACTERISTICS
DC Output Voltage Swing
R
L
= 2 k
, Saturated Output
±4
V
Capacitive Load Drive
30% Overshoot, G = +2
20
pF
POWER SUPPLY
Operating Range
3.0
12
V
Quiescent Current per Amplifier
1.0
1.5
mA
Power Supply Rejection Ratio
­ Supply
­71
­77
dB
+ Supply
­64
­70
dB
POWER-DOWN DISABLE
*
Turn-On Time
180
ns
Turn-Off Time
700
ns
Disable Voltage ­ Part is OFF
+V
S
­ 4.5
V
Disable Voltage ­ Part is ON
+V
S
­ 2.5
V
Disabled Quiescent Current
0.2
mA
Disabled In/Out Isolation
f = 1 MHz
­60
dB
*Only available in AD8038 SOIC-8 package.
Specifications subject to change without notice.
REV. B
AD8038/AD8039
­3­
SPECIFICATIONS
(T
A
= 25 C, V
S
= 5 V, R
L
= 2 k to V
S
/2, Gain = +1, unless otherwise noted.)
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
­3 dB Bandwidth
G = 1, V
O
= 0.2 V p-p
275
300
MHz
G = 2, V
O
= 0.2 V p-p
150
MHz
G = 1, V
O
= 2 V p-p
30
MHz
Bandwidth for 0.1 dB Flatness
G = 2, V
O
= 0.2 V p-p
45
MHz
Slew Rate
G = 1, V
O
= 2 V Step, R
L
= 2 k
340
365
V/
µs
Overdrive Recovery Time
G = 2, 1 V Overdrive
50
ns
Settling Time to 0.1%
G = 2, V
O
= 2 V Step
18
ns
NOISE/HARMONIC PERFORMANCE
SFDR
Second Harmonic
f
C
= 1 MHz, V
O
= 2 V p-p, R
L
= 2 k
­82
dBc
Third Harmonic
f
C
= 1 MHz, V
O
= 2 V p-p, R
L
= 2 k
­79
dBc
Second Harmonic
f
C
= 5 MHz, V
O
= 2 V p-p, R
L
= 2 k
­60
dBc
Third Harmonic
f
C
= 5 MHz, V
O
= 2 V p-p, R
L
= 2 k
­67
dBc
Crosstalk, Output-to-Output
f = 5 MHz, G = 2
­70
dB
Input Voltage Noise
f = 100 kHz
8
nV/
Hz
Input Current Noise
f = 100 kHz
600
fA/
Hz
DC PERFORMANCE
Input Offset Voltage
0.8
3
mV
Input Offset Voltage Drift
3
µV/°C
Input Bias Current
400
750
nA
Input Bias Current Drift
3
nA/
°C
Input Offset Current
30
±nA
Open-Loop Gain
V
O
=
±2.5 V
70
dB
INPUT CHARACTERISTICS
Input Resistance
10
M
Input Capacitance
2
pF
Input Common-Mode Voltage Range
R
L
= 1 k
1.0­4.0
V
Common-Mode Rejection Ratio
V
CM
=
±1 V
59
65
dB
OUTPUT CHARACTERISTICS
DC Output Voltage Swing
R
L
= 2 k
, Saturated Output
0.9­4.1
V
Capacitive Load Drive
30% Overshoot
20
pF
POWER SUPPLY
Operating Range
3
12
V
Quiescent Current per Amplifier
0.9
1.5
mA
Power Supply Rejection Ratio
­65
­71
dB
POWER-DOWN DISABLE
*
Turn-On Time
210
ns
Turn-Off Time
700
ns
Disable Voltage ­ Part is OFF
+V
S
­ 4.5
V
Disable Voltage ­ Part is ON
+V
S
­ 2.5
V
Disabled Quiescent Current
0.2
mA
Disabled In/Out Isolation
f = 1 MHz
­60
dB
*Only available in AD8038 SOIC-8 package.
Specifications subject to change without notice.
REV. B
­4­
AD8038/AD8039
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8038/AD8039 features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . See Figure 2
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . .
±V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . .
±4 V
Storage Temperature . . . . . . . . . . . . . . . . . . ­65
°C to +125°C
Operating Temperature Range . . . . . . . . . . . ­40
°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300
°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8038/AD8039
package is limited by the associated rise in junction temperature (T
J
)
on the die. The plastic encapsulating the die will locally reach the
junction temperature. At approximately 150
°C, which is the glass
transition temperature, the plastic will change its properties. Even
temporarily exceeding this temperature limit may change the stresses
that the package exerts on the die, permanently shifting the parametric
performance of the AD8038/AD8039. Exceeding a junction tempera-
ture of 175
°C for an extended period of time can result in changes
in the silicon devices, potentially causing failure.
The still-air thermal properties of the package and PCB (
JA
), ambient
temperature (T
A
), and total power dissipated in the package (P
D
)
determine the junction temperature of the die. The junction
temperature can be calculated as follows:
T
T
P
A
D
A
J
=
+
×
(
)
J
The power dissipated in the package (P
D
) is the sum of the quiescent
power dissipation and the power dissipated in the package due to the
load drive for all outputs. The quiescent power is the voltage between
the supply pins (V
S
) multiplied by the quiescent current (I
S
). Assuming
the load (R
L
) is referenced to midsupply, then the total drive power is
V
S
/ 2
× I
OUT,
some of which is dissipated in the package and some
in the load (V
OUT
× I
OUT
). The difference between the total drive
power and the load power is the drive power dissipated in the package.
P
D
= quiescent power + (total drive power ­ load power)
P
V
I
V
V
R
V
R
D
S
S
S
OUT
L
OUT
L
=
×
[
]
+
(
)
×
(
)
[
]
[
]
/
/
­
/
2
2
AMBIENT TEMPERATURE ­ C
0
­55
MAXIMUM POWER DISSIPATION ­ W
1.0
­25
5
35
65
95
125
1.5
2.0
SOIC-8
0.5
SOT23-8
SC70-5
Figure 2. Maximum Power Dissipation vs.
Temperature for a Four-Layer Board
RMS output voltages should be considered. If R
L
is referenced to
V
S­
, as in single-supply operation, then the total drive power is
V
S
I
OUT
.
If the RMS signal levels are indeterminate, then consider the
worst case, when V
OUT
= V
S
/ 4 for R
L
to midsupply:
P
V
I
V
R
D
S
S
S
L
=
×
(
)
+
(
)
/
/
4
2
In single-supply operation with R
L
referenced to V
S­
, worst case is
V
OUT
= V
S
/ 2.
Airflow will increase heat dissipation effectively reducing
JA
. Also,
more metal directly in contact with the package leads from metal traces,
through holes, ground, and power planes, will reduce the
JA
. Care
must be taken to minimize parasitic capacitances at the input leads
of high speed op amps as discussed in the board layout section.
Figure 2 shows the maximum safe power dissipation in the package
versus the ambient temperature for the SOIC-8 (125
°C/W), SC70-5
(210
°C/W), and SOT23-8 (160°C/W) package on a JEDEC standard
four-layer board.
JA
values are approximations.
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current from
the AD8038/AD8039 will likely cause a catastrophic failure.
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Outline
Branding Information
AD8038AR
­40
°C to +85°C
8-Lead SOIC
SO-8
AD8038AR-REEL
­40
°C to +85°C
8-Lead SOIC
SO-8
AD8038AR-REEL7
­40
°C to +85°C
8-Lead SOIC
SO-8
AD8038AKS-REEL
­40
°C to +85°C
5-Lead SC70
KS-5
HUA
AD8038AKS-REEL7
­40
°C to +85°C
5-Lead SC70
KS-5
HUA
AD8039AR
­40
°C to +85°C
8-Lead SOIC
SO-8
AD8039AR-REEL
­40
°C to +85°C
8-Lead SOIC
SO-8
AD8039AR-REEL7
­40
°C to +85°C
8-Lead SOIC
SO-8
AD8039ART-REEL
*
­40
°C to +85°C
8-Lead SOT23
RT-8
HYA
AD8039ART-REEL7
*
­40
°C to +85°C
8-Lead SOT23
RT-8
HYA
*Under development.
REV. B
Typical Performance Characteristics­AD8038/AD8039
­5­
FREQUENCY ­ MHz
GAIN ­ dB
­6
0.1
1000
1
10
100
­3
0
3
6
9
12
15
18
21
24
G = +5
G = +2
G = +1
G = +10
FREQUENCY ­ MHz
GAIN ­ dB
0.1
1000
1
10
100
0
1
6
7
V
S
= 5V
5
4
3
2
V
S
= 2.5V
V
S
= 1.5V
FREQUENCY ­ MHz
GAIN ­ dB
0.1
1000
1
10
100
0
1
6
7
R
L
= 2k
5
4
3
2
R
L
= 1k
R
L
= 500
(Default Conditions: 5 V, C
L
= 5 pF, G = +2, R
G
= R
F
= 1 k
, R
L
= 2 k
, V
O
= 2 V p-p, Frequency = 1 MHz, T
A
= 25 C.)
TPC 1. Small Signal Frequency
Response for Various Gains,
V
OUT
= 500 mV p-p
FREQUENCY ­ MHz
GAIN ­ dB
0.1
1000
1
10
100
0
1
6
7
R
L
= 2k
5
4
3
2
R
L
= 1k
R
L
= 500
TPC 4. Small Signal Frequency
Response for Various R
LOAD
,
V
S
= 5 V, V
OUT
= 500 mV p-p
FREQUENCY ­ MHz
GAIN ­ dB
0
­4
1
2
3
4
1
10
100
C
L
= 15pF
C
L
= 10pF
C
L
= 5pF
­5
­3
­2
­1
5
1000
TPC 7. Small Signal Frequency
Response for Various C
LOAD
,
V
OUT
= 500 mV p-p, V
S
=
±5 V,
G = +1
TPC 2. Small Signal Frequency
Response for Various Supplies,
V
OUT
= 500 mV p-p
FREQUENCY ­ MHz
GAIN ­ dB
0
0.1
1
2
3
4
5
6
7
8
1
10
100
R
L
= 500
R
L
= 2k
R
L
= 1k
TPC 5. Large Signal Frequency
Response for Various R
LOAD
,
V
OUT
= 3 V p-p, V
S
= 5 V
FREQUENCY ­ MHz
GAIN ­ dB
1
3
1
10
100
C
L
= 10pF
C
L
= 5pF
­5
­3
­1
5
1000
7
C
L
= 15pF
TPC 8. Small Signal Frequency
Response for Various C
LOAD
,
V
OUT
= 500 mV p-p, V
S
= 5 V, G
= +1
TPC 3. Small Signal Frequency
Response for Various R
LOAD
,
V
S
=
±5 V, V
OUT
= 500 mV p-p
FREQUENCY ­ MHz
GAIN ­ dB
0
0.1
1
2
3
4
5
6
7
8
1
10
100
R
L
= 500
R
L
= 2k
R
L
= 1k
TPC 6. Large Signal Frequency
Response for Various R
LOAD
,
V
OUT
= 4 V p-p, V
S
=
±5 V
FREQUENCY ­ MHz
GAIN ­ dB
0.1
1000
1
10
100
­6
1
V
OUT
= 500mV
2
V
OUT
= 200mV
V
OUT
= 2V
V
OUT
= 1V
­5
­4
­3
­2
­1
0
TPC 9. Frequency Response for
Various Output Voltage Levels
REV. B
­6­
AD8038/AD8039
FREQUENCY ­ MHz
OPEN-LOOP GAIN ­ dB
0
0.01
10
0.1
1
10
100
1000
GAIN
20
30
40
50
60
70
80
PHASE
0
PHASE ­ De
g
rees
­10
­20
180
45
­45
135
90
TPC 10. Open-Loop Gain and
Phase,
V
S
=
±5 V
FREQUENCY ­ MHz
1
8
2
3
4
5
6
7
HARMONIC DISTORTION ­ dBc
­90
­85
­80
­75
­70
­65
­60
­55
­50
9
10
R
L
= 500 HD2
R
L
= 500 HD3
R
L
= 2k HD3
R
L
= 2k HD2
­45
TPC 13. Harmonic Distortion vs.
Frequency for Various Loads,
V
S
= 5 V, V
OUT
= 2 V p-p, G = +2
AMPLITUDE ­ V p-p
1
2
3
4
HARMONIC DISTORTION ­ dBc
­100
­80
­70
­60
­50
10MHz HD2
10MHz HD3
5MHz HD2
5MHz HD3
1MHz HD2
1MHz HD3
­90
­40
TPC 16. Harmonic Distortion vs.
V
OUT
Amplitude for Various
Frequencies,
V
S
=
±5 V, G = +2
FREQUENCY ­ MHz
GAIN ­ dB
0.1
1000
1
10
100
0
6
9
3
­3
­40 C
+85 C
+25 C
TPC 11. Frequency Response
vs. Temperature, Gain = +2, V
S
=
±5 V, V
OUT
= 2V p-p
FREQUENCY ­ MHz
1
8
2
3
4
5
6
7
HARMONIC DISTORTION ­ dBc
­90
­80
­70
­60
­50
9
10
G = +1 HD2
G = +2 HD2
G = +1 HD3
G = +2 HD3
­100
TPC 14. Harmonic Distortion vs.
Frequency for Various Gains,
V
S
=
±5 V, V
OUT
= 2 V p-p
AMPLITUDE ­ V p-p
1.0
HARMONIC DISTORTION ­ dBc
­85
­75
­65
­55
10MHz HD2
10MHz HD3
5MHz HD2
5MHz HD3
1MHz HD2
­95
­45
1.5
2.0
2.5
3.0
1MHz HD3
TPC 17. Harmonic Distortion vs.
Amplitude for Various Frequencies,
V
S
= 5 V, G = +2
FREQUENCY ­ MHz
1
8
2
3
4
5
6
7
HARMONIC DISTORTION ­ dBc
­90
­85
­80
­75
­70
­65
­60
­55
­50
9
10
R
L
= 500 HD2
R
L
= 500 HD3
R
L
= 2k HD3
R
L
= 2k HD2
TPC 12. Harmonic Distortion vs.
Frequency for Various Loads,
V
S
=
±5 V, V
OUT
= 2 V p-p, G = +2
FREQUENCY ­ MHz
1
8
2
3
4
5
6
7
HARMONIC DISTORTION ­ dBc
­100
­90
­70
­60
­50
9
10
G = +1 HD2
G = +2 HD2
G = +1 HD3
G = +2 HD3
­80
TPC 15. Harmonic Distortion vs.
Frequency for Various Gains,
V
S
= 5 V, V
OUT
= 2 V p-p
1000
VO
LTA
G
E

NOISE ­ nV/
Hz
100
10
1
10
FREQUENCY ­ Hz
10M
100k
1k
100
10k
1M
100M
TPC 18. Input Voltage Noise vs.
Frequency
(Default Conditions: 5 V, C
L
= 5 pF, G = +2, R
G
= R
F
= 1 k
, R
L
= 2 k
, V
O
= 2 V p-p, Frequency = 1 MHz, T
A
= 25 C.)
REV. B
AD8038/AD8039
­7­
FREQUENCY ­ Hz
100
10
100
1000
10000
100000
1M
NOISE ­ fA/
Hz
1000
100000
10000
TPC 19. Input Current Noise vs.
Frequency
50mV/DIV
5ns/DIV
C
L
= 25pF WITH
R
SNUB
= 19.6
C
L
= 10pF
C
L
= 5pF
TPC 22. Small Signal Transient
Response for Various Capacitive
Loads, V
S
= 5 V
R
L
= 500
R
L
= 2k
1V/DIV
5ns/DIV
TPC 25. Large Signal Transient
Response for Various R
LOAD
,
V
S
=
±5 V
R
L
= 500
R
L
= 2k
50mV/DIV
5ns/DIV
TPC 20. Small Signal Transient
Response for Various R
LOAD
,
V
S
= 5 V
50mV/DIV
5ns/DIV
C
L
= 25pF WITH
R
SNUB
= 19.6
C
L
= 10pF
C
L
= 5pF
TPC 23. Small Signal Transient
Response for Various Capacitive
Loads, V
S
=
±5 V
C
L
= 25pF
500mV/DIV
5ns/DIV
C
L
= 5pF
2.5V
TPC 26. Large Signal Transient
Response for Various Capacitive
Loads, V
S
= 5 V
R
L
= 500
R
L
= 2k
50mV/DIV
5ns/DIV
TPC 21. Small Signal Transient
Response for Various R
LOAD
,
V
S
=
±5 V
R
L
= 500
R
L
= 2k
500mV/DIV
5ns/DIV
2.5V
TPC 24. Large Signal Transient
Response for Various R
LOAD
,
V
S
= 5 V
500mV/DIV
5ns/DIV
C
L
= 10pF
C
L
= 5pF
TPC 27. Large Signal Transient
Response for Various Capacitive
Loads, V
S
=
±5 V
(Default Conditions: 5 V, C
L
= 5 pF, G = +2, R
G
= R
F
= 1 k
, R
L
= 2 k
, V
O
= 2 V p-p, Frequency = 1 MHz, T
A
= 25 C.)
REV. B
­8­
AD8038/AD8039
OUT
IN
2V/DIV
50ns/DIV
TPC 28. Input Overdrive
Recovery, Gain = +1
INPUT 1V/DIV
OUTPUT 2V/DIV
50ns/DIV
IN
OUT
TPC 29. Output Overdrive
Recovery, Gain = +2
FREQUENCY ­ MHz
CMRR ­ dB
1
1000
10
100
V
S
= +5V
­80
­70
­60
­50
­40
­30
­20
­10
V
S
= 5V
0.5V/DIV
5ns/DIV
2mV/DIV
V
IN
ERROR
VOLTAGE
V
S
= 5V
G = +2
V
OUT
= 2V p-p
+0.1%
­0.1%
0
t = 0
TPC 30. 0.1% Settling Time
V
OUT
= 2 V p-p
FREQUENCY ­ MHz
IMPEDANCE ­
0.1
0.01
0.1
1
10
100
1000
V
S
= 5V
V
S
= +5V
1
10
100
1000
FREQUENCY ­ MHz
CROSSTALK ­ dB
0.1
1000
1
10
100
SIDE A
­100
­40
­20
SIDE B
­10
­30
­50
­60
­70
­80
­90
TPC 31. AD8039 Crosstalk,
V
IN
= 1 V p-p, Gain = +1
PSRR ­ dB
­90
­80
­70
­60
­50
­40
­30
­20
­10
0
10
+PSRR
­PSRR
FREQUENCY ­ MHz
0.001
1000
0.01
10
100
1
TPC 34. PSRR vs. Frequency
TPC 33. Output Impedance vs.
Frequency
SUPPLY VOLTAGE ­ V
SUPPL
Y CURRENT ­ mA
1.25
1.00
0
0
12
2
4
6
8
10
0.75
0.50
0.25
TPC 36. AD8038 Supply Current vs.
Supply Voltage
R
LOAD
­
200
300
500
V
OUT
­ p-p
0
1
2
3
4
5
6
7
8
9
V
S
= +5V
V
S
= 5V
0
100
400
TPC 35. Output Swing vs. Load
Resistance
TPC 32. CMRR vs. Frequency,
V
IN
= 1 V p-p
(Default Conditions: 5 V, C
L
= 5 pF, G = +2, R
G
= R
F
= 1 k
, R
L
= 2 k
, V
O
= 2 V p-p, Frequency = 1 MHz, T
A
= 25 C.)
REV. B
AD8038/AD8039
­9­
FREQUENCY ­ MHz
ISOLA
T
ION ­ dB
­90
­80
­70
­60
­50
­40
­30
­20
­10
0
0.1
1000
1.0
10
100
TPC 37. AD8038 Input-Output Isolation (G = +2,
R
L
= 2 k
, V
S
=
±5V
LAYOUT, GROUNDING, AND BYPASSING
CONSIDERATIONS
Disable
The AD8038 in the SOIC-8 package provides a disable feature.
This feature disables the input from the output (see TPC 37 for
input-output isolation) and reduces the quiescent current from
typically 1 mA to 0.2 mA. When the
DISABLE node is pulled
below 4.5 V from the positive supply rail, the part becomes
disabled. In order to enable the part, the
DISABLE node needs
to be pulled up to above 2.5 V below the positive rail.
Power Supply Bypassing
Power supply pins are actually inputs, and care must be taken
so that a noise-free stable dc voltage is applied. The purpose
of bypass capacitors is to create low impedances from the sup-
ply to ground at all frequencies, thereby shunting or filtering a
majority of the noise.
Decoupling schemes are designed to minimize the bypassing
impedance at all frequencies with a parallel combination of
capacitors. 0.01
µF or 0.001 µF (X7R or NPO) chip capacitors
are critical and should be as close as possible to the amplifier
package. Larger chip capacitors, such as the 0.1
µF capacitor,
can be shared among a few closely spaced active components in
the same signal path. A 10
µF tantalum capacitor is less critical
for high frequency bypassing and, in most cases, only one per
board is needed at the supply inputs.
Grounding
A ground plane layer is important in densely packed PC boards
to spread the current minimizing parasitic inductances.
However, an understanding of where the current flows in a circuit
is critical to implementing effective high speed circuit design.
The length of the current path is directly proportional to the
magnitude of parasitic inductances, and thus the high frequency
impedance of the path. High speed currents in an inductive
ground return will create an unwanted voltage noise.
The length of the high frequency bypass capacitor leads are most
critical. A parasitic inductance in the bypass grounding will
work against the low impedance created by the bypass capacitor.
Place the ground leads of the bypass capacitors at the same
physical location. Because load currents flow from the supplies
as well, the ground for the load impedance should be at the
same physical location as the bypass capacitor grounds. For the
larger value capacitors, which are intended to be effective at
lower frequencies, the current return path distance is less critical.
Input Capacitance
Along with bypassing and ground, high speed amplifiers can be
sensitive to parasitic capacitance between the inputs and ground. A
few pF of capacitance will reduce the input impedance at high
frequencies, in turn increasing the amplifiers' gain, causing peaking
of the frequency response, or even oscillations if severe enough.
It is recommended that the external passive components that
are connected to the input pins be placed as close as possible to
the inputs to avoid parasitic capacitance. The ground and power
planes must be kept at a distance of at least 0.05 mm from the
input pins on all layers of the board.
Output Capacitance
To a lesser extent, parasitic capacitances on the output can cause
peaking of the frequency response. There are two methods to
minimize this effect.
1. Put a small value resistor in series with the output to isolate
the load capacitor from the amp's output stage; see TPCs 7,
8, 22, and 23.
2. Increase the phase margin with higher noise gains or add a pole
with a parallel resistor and capacitor from ­IN to the output.
Input-to-Output Coupling
The input and output signal traces should not be parallel to
minimize capacitive coupling between the inputs and outputs,
avoiding any positive feedback.
APPLICATIONS
Low Power ADC Driver
8
1
0.1 F
10 F
+5V
0.1 F
10 F
7
0.1 F
10 F
­5V
3
2
6
5
4
AD8039
1k
1k
1k
1k
VINA
VINB
REF
50
50
AD9203
1k
1k
1k
1k
V
IN
0V
3V
2.5V
Figure 3. Schematic to Drive AD9203 with the AD8039
Differential A/D Driver
The AD9203 is a low power (125 mW on a 5 V supply) 40 MSPS
10-bit converter. This represents a breakthrough in power/speed
for ADCs. As such, the low power, high performance AD8039
is an appropriate choice of amplifier to drive it.
In low supply voltage applications, differential analog inputs are
needed to increase the dynamic range of the ADC inputs.
Differential driving can also reduce second and other even-order
distortion products. The AD8039 can be used to make a
dc-coupled, single-ended-to-differential driver for one of these
ADCs. Figure 3 is a schematic of such a circuit for driving an
AD9203, a 10-bit, 40 MSPS ADC.
REV. B
­10­
AD8038/AD8039
The AD9203 works best when the common-mode voltage at the
input is at the midsupply or 2.5 V. The output stage design of
the AD8039 makes it ideal for driving these types of ADCs.
In this circuit, one of the op amps is configured in the inverting
mode, while the other is in the noninverting mode. However, to
provide better bandwidth matching, each op amp is configured
for a noise gain of +2. The inverting op amp is configured for a
gain of ­1, while the noninverting op amp is configured for a
gain of +2. Each has a very similar ac response. The input signal
to the noninverting op amp is divided by 2 to normalize its
voltage level and make it equal to the inverting output.
The outputs of the op amps are centered at 2.5 V, which is the
midsupply level of the ADC. This is accomplished by first taking
the 2.5 V reference output of the ADC and dividing it by 2 with a
pair of 1 k
resistors. The resulting 1.25 V is applied to each op
amp's positive input. This voltage is then multiplied by the gain of
the op amps to provide a 2.5 V level at each output.
Low Power Active Video Filter
Some composite video signals derived from a digital source
contain clock feedthrough that can limit picture quality. Active
filters made from op amps can be used in this application, but
they will consume 25 mW to 30 mW for each channel. In
power-sensitive applications, this can be too much, requiring the
use of passive filters that can create impedance matching prob-
lems when driving any significant load.
The AD8038 can be used to make an effective low-pass active
filter that consumes one-fifth of the power consumed by an
active filter made from an op amp. Figure 4 shows a circuit that
uses an AD8038 to create a single
±2.5 V supply, three-pole
Sallen-Key filter. This circuit uses a single RC pole in front
of a standard two-pole active section.
0.1 F
+2.5V
10 F
­2.5V
0.1 F
10 F
C3
33pF
R3
49.9k
R
F
1k
680pF
R5
49.9k
R2
499k
C1
100pF
R1
200k
R4
49.9k
AD8038
V
IN
V
OUT
Figure 4. Low-Pass Filter for Video
Figure 5 shows the frequency response of this filter. The response
is down 3 dB at 6 MHz, so it passes the video band with little
attenuation. The rejection at 27 MHz is 45 dB, which provides
more than a factor of 100 in suppression of the clock components
at this frequency.
FREQUENCY ­ MHz
0.1
GAIN ­ dB
1
10
100
­10
10
0
­20
­30
­40
­50
­60
Figure 5. Video Filter Response
REV. B
AD8038/AD8039
­11­
OUTLINE DIMENSIONS
8-Lead Plastic SOIC
(R-8)
0.25 (0.0098)
0.19 (0.0075)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)
45
8
0
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
8
5
4
1
5.00 (0.1968)
4.80 (0.1890)
PIN 1
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.33 (0.0130)
COPLANARITY
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-012 AA
8-Lead Plastic Surface Mount
(RT-8)
*
3
5
6
2
8
0.122 (3.10)
0.110 (2.80)
PIN 1
0.071 (1.80)
0.059 (1.50)
0.077
(1.95)
BSC
0.026
(0.65) BSC
4
7
0.015 (0.38)
0.009 (0.22)
0.006 (0.15)
0.000 (0.00)
0.051 (1.30)
0.035 (0.90)
SEATING
PLANE
0.057 (1.45)
0.035 (0.90)
0.009 (0.23)
0.003 (0.08)
0.022 (0.55)
0.014 (0.35)
10
0
0.112 (2.80)
*Not yet released.
5-Lead SC70
(KS-5)
0.012 (0.30)
0.006 (0.15)
0.004 (0.10)
0.000 (0.00)
0.039 (1.00)
0.031 (0.80)
SEATING
PLANE
0.043 (1.10)
0.031 (0.80)
0.007 (0.18)
0.004 (0.10)
0.012 (0.30)
0.004 (0.10)
0.016 (0.40)
0.004 (0.10)
3
5
4
1
2
0.087 (2.20)
0.071 (1.80)
PIN 1
0.094 (2.40)
0.071 (1.80)
0.026 (0.65) BSC
0.053 (1.35)
0.045 (1.15)
Dimensions shown in millimeters and (inches)
Dimensions shown in inches and (mm)
Dimensions shown in inches and (mm)
REV. B
­12­
AD8038/AD8039
Revision History
Location
Page
5/02­Data Sheet changed from REV. A to REV. B.
Add part number AD8038 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UNIVERSAL
Changes to Product Title . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to CONNECTION DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Update to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Update to MAXIMUM POWER DISSIPATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Update to OUTPUT SHORT CIRCUIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Update to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Change to FIGURE 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Change to TPC 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Change to TPC 18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Change to TPC 27 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Change to TPC 29 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Change to TPC 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Change to TPC 31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Added TPC 36 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Added TPC 37 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Edits to Low Power Active Video Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Change to Figure 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Data Sheet changed from REV. 0 to REV. A.
Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Update SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2, 3
Edits to TPC 19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
C02951­0­5/02(B)
PRINTED IN U.S.A.